I'm experimenting with differential amplifiers, and I'm trying to simulate some ways that the common-mode rejection ratio of a DA in the real-world would be decreased. (In other words, ways to increase the common-mode gain of the DA). I've already been able to do this one way by imbalancing the input resistances, which reduced the CMRR, but I'd like to do it with some external interference as well.

I've found out that two types of common-mode signal interference are:

  • noise signals due to a difference in ground potentials at the transmitting and receiving locations
  • noise signals due to capacitative, electromagnetic or inductive coupling/interference from external sources

I'd like to be able to simulate one or both of these noise signals on my DA inputs, but I'm not sure how? The first one with differing ground potentials - would that be as simple as connecting the DA and the source signals to different -Vcc terminals? For example one connected to -15V and one connected to 0V? Or am I misunderstanding that?

For the second one, I tried to introduce some magnetic interference with inductors on each input signal (using the images in this previous post reply), but it didn't do anything. Any advice?

  • 1
    \$\begingroup\$ I think you should post a schematic of your LTSpice sim. \$\endgroup\$
    – Andy aka
    Dec 15, 2020 at 18:29
  • \$\begingroup\$ Are you trying to play with the common-mode rejection of the entire overall circuit, or just the part that the amplifier alone contributes? \$\endgroup\$
    – Ste Kulov
    Dec 16, 2020 at 3:46

1 Answer 1


You can measure CMRR in spice the same way that it is measured in the real world. Below is how analog devices measures there amplifiers, the same setup can be done in spice. It will only match the real world values if the model matches the real world closely. Where the amplifier in the schematic below says DUT, this is where one would plug in their amplifier model. Once CMRR is simulated correctly, the CMRR of the device can be modeled.

The test circuit is ideally suited to measuring CMRR (Figure 6). The common-mode voltage is not applied to the DUT input terminals, where low-level effects would be likely to disrupt the measurement, but the power-supply voltages are altered (in the same—i.e., common—direction, relative to the input), while the remainder of the circuit is left undisturbed.

In the circuit of Figure 6, the offset is measured at TP1 with supplies of ±V (in the example, +2.5 V and –2.5 V) and again with both supplies moved up by +1 V to +3.5 V and –1.5 V). The change of offset corresponds to a change of common mode of 1 V, so the dc CMRR is the ratio of the offset change and 1 V.

enter image description here Source: https://www.analog.com/en/analog-dialogue/articles/simple-op-amp-measurements.html

  • \$\begingroup\$ i think you've misunderstood my question. I know how to measure CMRR, Im asking how I can simulate interference that would cause the CMRR to be reduced. IE electromagnetic interference on the input signals. Please do not edit my question if you havent understood what Im asking. \$\endgroup\$
    – MendelumS
    Dec 15, 2020 at 21:29
  • \$\begingroup\$ No problem, you can always roll it back \$\endgroup\$
    – Voltage Spike
    Dec 15, 2020 at 22:40
  • 1
    \$\begingroup\$ You may want to know that "any advice" is a bad question, you may want to make it more specific. \$\endgroup\$
    – Voltage Spike
    Dec 15, 2020 at 22:41

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