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I'm wondering about the case of PRSNT PCIe connections for the case where a board might be supporting bifurcation (I think most common case would be NVMe) - for example utilizing dual x8 PCIe hard-IP in a FPGA - and could not find a quick easy reference for such a case.

If a board was installed in a x16 slot, bifurcated for x8x8, how should the PRSNT2 pins be connected? Would it simply be the same as x16 (PRSNT# connected to farthest PRSNT2# pin)?

Are there any references to this anywhere? (aside from PCISIG)

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  • \$\begingroup\$ Where you able to bifurcate your FPGA in an x8x8 topology? I'm trying to do the same with a ZU19EG Zynq on a motherboard that supports bifurcation, but I only get a single x8 enumerated. In the BIOS I set x8x8 and PRSNT at x16. \$\endgroup\$ Jul 3, 2023 at 10:59
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    \$\begingroup\$ I did also set the PRSNT for x16 and I did have both enumerated. One thought is: are you setting each of the x8 IP with different Device ID? It's been a couple of years and I cannot recall if this was necessary. It was for me as one of the IP had the AXI-Lite interface enabled for register space, so I used different Device ID. Not sure if this is why it worked. But it worked. Good luck! \$\endgroup\$
    – johnnymopo
    Jul 5, 2023 at 16:49

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The PRSNT# connection is there to tell the host the maximum number of lanes connected, so the BIOS knows which lanes might have link partners and can test for them.

Bifurcation is a different matter. After the host determines the card size with PRSNT#, it will detect the link partners and then continue lane width training within each bifurcated lane set.

So if our card has 16 lanes arranged as 4x4 (e.g.; an NVMe adapter with four M.2s) it should ID on PRSNT# as a 16-lane card. The BIOS will then try to train up and enumerate four endpoints out of those lane sets.

In other words, if you wire the 16-lane card to say via PRSNT# that it has only 8 lanes, BIOS will think it is an 8-lane card and only try to identify link partners on the low 8 lanes.

So your x8/x8 bifurcated card should nevertheless be wired with the PRSNT# pins set for 16 lanes.

Yes, the host could ignore PRSNT# and simply test for all 16 link partners, but that’s not how PCIe is set up to work.

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