I'm going to make a JBOD, the SATA HBA is 2X PCIe Gen3enter image description here

and my new Mobo only support new PCIe Gen4 8x

I want to fully utilise a Gen4 8x to connect many 2x Gen3 HBAs, so I've found this Gen4 swich from microchipenter image description here

28 Lanes model can use 8X Gen4 for upstream and 8 * 2x Gen3 downstream, my question is does PCIe switch in general or just this model design to bridge between different Gen(like Gen4 to Gen3) and the downstream 8 * 2x Gen3 can fully utilise the upstream 8x Gen4?

P.S My thinking is Gen4 = 2 * Gen3, so upstream and downstream are equal, so all the bandwidth should be utilised.

  • \$\begingroup\$ PCIe always starts the link partner sequence using gen 1 speed. The link partners share the speed advertisement fields to determine what link rate to attempt. \$\endgroup\$ Dec 20 '20 at 8:47
  • \$\begingroup\$ @PeterSmith Does it mean uplink can run on Gen4 speed, whereas downlink runs on Gen3, and there's no bottom neck caused by the difference \$\endgroup\$
    – mko
    Dec 20 '20 at 12:28

PCI express links are based on link partners. The maximum rate for a given pair is the slowest of the available link speeds.

If you connect a gen 3 port to a gen 4 port, then the maximum rate for that pair will be gen 3.

With a switch (which is really hubs), each port will train to the maximum rate available provided your layout supports it. If you have gen 3 and gen 4 ports then each will train accordingly.

So you can have a gen 4 switch with ports at different rates.

Note that the overall link performance depends on payload size and the amount of data. Small files sometimes benefit from smaller payload sizes but this is very application dependent and is a design choice.

Profiling the links is often necessary for overall optimal performance.

  • \$\begingroup\$ Thanks, your answer is what I expected behaviour. So a switch can have different speed for each ports, and 1X Gen4 uplink can saturate 2X Gen3 downlink, am I correct on this point? \$\endgroup\$
    – mko
    Dec 20 '20 at 15:48
  • \$\begingroup\$ If there is sufficient traffic the switch will 'saturate' in the sense that the flow control used will run out of credits. \$\endgroup\$ Dec 20 '20 at 16:01
  • \$\begingroup\$ thank for clarifying this point \$\endgroup\$
    – mko
    Dec 21 '20 at 1:08

PCIe switches perform 1-to-N switching, so you can add as many PCIe 3.0 x2 devices as the switch permits or until the uplink is saturated.

However, those switches do not change the lane speed/PCIe generation (or I haven't seen that at least), so whether the switch is connected to a 3.0 x8 or 4.0 x8 slot doesn't matter, not even whether the switch supports Gen4 at all.


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