The Jetson nano Dev Board uses a voltage level translator on the GPIO (TXB0108) to convert from 3v3 to 1v8. (As given in the reference document.) I would like to drive this ADC, the AD7091R-4, to measure some analog voltages over SPI. Now I've read that the JN devboard GPIO inputs need a rather strong pull-up to work. I've tested and verified that, to pull up a button it needs a 1.5k pull up or stronger. The datasheet of the ADC states that the logic outputs lose .2 to .4 volt (depending on source or sink) when driving something with 200uA. (page 3) ADC datasheet This corresponds to a 16.5k load resistor at 3v3.

Does this mean that it won't be able to drive the logic inputs of the Jetson Nano dev board? If not, what schematic would I need if I want to make this work? (Add FET's to make it stronger?)

For reference, the simplified schematic of the voltage translator looks like this according to NVIDIA: Simplified TXB0108 Architecture Diagram

  • \$\begingroup\$ This question doesn't seem to get any traction. What should I improve to make it easier to answer? \$\endgroup\$
    – Ananas_hoi
    Dec 24 '20 at 15:13

While it's true the TXB0108 needs a strong pull-up to function when driven by an open drain source (such as a push-button to ground), such a pull-up is not needed when being driven by a digital output.

The reason for the strong pull-up is that it needs to be able to overcome the driving force of the bidirectional buffer. As you can see from the diagram, the output of the buffer includes a 4kΩ series resistor, meaning whatever drives the bidir buffer input must be able to overcome that drive strength in order to trigger the one-shots on the input to change state.

As you say, your ADC has limited drive strength, and the voltage will begin to drop away under the higher load. However, the TXB has a very wide tolerance on it's inputs - 0.65 x Vcc (2.1V) and 0.35 x Vcc (1.1V), meaning as long at the output can maintain that level momentarily, it will be sufficient to trigger the one-shots to fire, at which point the state of both drivers will flip to match your input and the 4kΩ load will in essence dissappear until the next time you the ADC toggles its output.

The datasheet for the ADC doesn't state what its maximum output drive current is, but I highly doubt that it will have any problems driving a 4kΩ load. You can simply connect the signals directly between the ADC and the buffer without any pull-up resistors and it should work fine.

If you are worried, you can always add a simple non-inverting buffer in between the SDO output from the ADC and the input to the bidir buffer. Something like the SN74LV1T34 or similar will do just fine - these are single logic gate buffers in tiny packages designed for such eventualities.


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