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The datasheet is mentioning a 32678 Hz "reference clock" (RCLK) input.

It appears to be a well known thing in this type of ICs because it's highlighted in the list of features. I guess because it's obvious to everyone they don't explain what this reference clock is used for. They mention some clocking mode (besides FM mode) it's used in, but it's not clear what it is.

What is the purpose of this reference clock (RCLK) signal?

Is it a PLL reference for the heterodyne?

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  • \$\begingroup\$ see electronics.stackexchange.com/questions/177844/… \$\endgroup\$
    – V.V.T
    Dec 23, 2020 at 1:21
  • \$\begingroup\$ @V.V.T, I don't think it has an RTC in the chip. \$\endgroup\$
    – axk
    Dec 23, 2020 at 1:24
  • \$\begingroup\$ @axk RTCs are just one example mentioned in the question, and the answer addresses ICs in general! Also, the whole IC you mention is a dominantly digital thing – that needs clocking. \$\endgroup\$ Dec 23, 2020 at 9:34

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For an ultra-low-power design, only low-frequency crystals are usable, because with the frequency increase the current consumption increases significantly. The article The Strengths of 32.768 kHz Oscillators is undoubtedly a commercial, but I venture to mention it because the article excels, first of all, the technological advantages of generic tuning fork crystals.

Their chief application being RTC circuitry, the tuning fork crystals operating at 32.768kHz, due to their excellent short-term, long-term and temperature stability and low power consumption, govern also the other time-critical functions of many common devices, among those are frequency synthesizers. The frequency synthesizer is an essential component of modern radio transceiver chips.

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