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I am currently reading the book "The Art of Electronics 3rd Edition". However I am having some difficulties to understand chapter "3.4.1 FET analog switch". This section is about how MOSFETs can be used for switching analog signals. As an example the circuit in picture 1 is used. About this circuit it is stated, that

  1. "the gate signal is not at all critical, as long as it is sufficiently more positive than the largest signal (to maintain \$R_{On}\$ low)"
  2. "negative signals would cause the FET to turn on with the gate grounded".

However, I don't understand both statements. I would perfectly agree to them, if the body was connected to the source. But this is not the case, instead the body is connected to ground. Therefore I assume that the electric field between gate and body (which leads to inversion of the semiconductor below the gate) is only changed by \$V_{Gate}\$ and \$V_{Body}\$, but not by \$V_{Drain}\$ or \$V_{Source}\$. But if this is true, the state of the FET should not be affected by the signal voltage, which contradicts both preceding statements... I would be grateful if somebody could help me with this issue :)

enter image description here

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  • \$\begingroup\$ Consider what happens to the voltage in the channel when it forms. That's going to matter too! \$\endgroup\$
    – Hearth
    Dec 24, 2020 at 15:10
  • \$\begingroup\$ They seem accurate enough statements to me. In fact I'd go as far to say that they are absolutely true. I think you need to justify why they wouldn't be true. \$\endgroup\$
    – Andy aka
    Dec 24, 2020 at 15:11
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    \$\begingroup\$ Maybe the missing conceptual piece is that the FET is arranged in a symmetrical way compared to a typical discrete MOSFET. Either terminal can function as source/drain. \$\endgroup\$
    – Pete W
    Dec 24, 2020 at 15:15
  • \$\begingroup\$ The core of my question is about the internal mechanics of a FET. The electric field between gate and body controls the number of charge carriers and through this R_{Drain to Source}. But why do V_{Source} and V_{Drain} matter? \$\endgroup\$
    – cakelover
    Dec 24, 2020 at 15:32
  • \$\begingroup\$ controls the depletion layer? (whichever one is the source) ... not sure tbh \$\endgroup\$
    – Pete W
    Dec 24, 2020 at 19:09

1 Answer 1

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You are incorrectly understanding the phrase:

negative signals would cause the FET to turn on with the gate grounded

If one of the two terminals (Source or Drain) go negative to ground the PN junction (diode) between any of them them and the body becames positive polarized and the current will flow between terminal and body.

To avoid the problem, if the signal can go negative, the body must be held at the lowest possible negative value.
The following phrase in the book is clear in that:

If you want to switch current signals that are of both polarities (eg -10V to 10V) ... the body terminal should be tied to -15V

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    \$\begingroup\$ Hello matzeri, thank you for your answer! As far as I understand it in the book, he means that in this case the FET turns on AND the body diode becomes conducting. The latter is clear, that will definitely happen. But why should the FET turn on? Just because the diode is conducting it doesn't mean that current can flow from the drain to the source. \$\endgroup\$
    – cakelover
    Dec 26, 2020 at 10:01
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    \$\begingroup\$ The diode will turn on. The FET will stop to work as FET \$\endgroup\$
    – matzeri
    Dec 26, 2020 at 10:45
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    \$\begingroup\$ Yes, I agree. But that is not how it is written in the book. Nonetheless, I understand that this situation is undesirable \$\endgroup\$
    – cakelover
    Dec 26, 2020 at 10:57

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