Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It only takes a minute to sign up.
Sign up to join this community
I have a question about the circuit above.
In the first place we can measure the current IR2 in given values, then using the current mirror topologies we can express IC7, IC8, IC3, IC11 and the other currents at the top which is active loaded differential amplifier topology.
But I cannot find a way to evaluate the currents IR3, IC9 and IC12. Anything would be very helpful.
Without closing the loop the voltage across (and hence current thru) R3 is defined mostly by the parameter variation within the devices, anything spice gives you will be unreliable at best, and it might just peg to one rail in the spice model while doing something different (and probably temperature dependent) in reality.
Feedback would fix that, try about say 19k between the output and the base of Q5 (You will probably want a cap of a few tens of pF across the CB junction of Q11 to stop it oscillating).
Current in Q9, Q12, is dependent on how well their Vt tracks that of the two diodes, real designs add a little emitter resistance to those two transistors and then use a VBE multiplier to allow the operating point to be set reliably (And even then the VBE multiplier transistor needs to be thermally coupled to the output devices).
While you can come up (probably) with something gnarly equating the diode equation and Ebbers-Moll or similar, I would take the view that you have it in spice already, just hit run, it will not be any more wrong then anything else.
It wants feedback, emitter resistors, a dominant pole cap, a VBE multiplier instead of those diodes, degenerate the LTP emitters to improve slew rate, maybe a baker clamp diode to make it better behaved coming out of clipping... Apart from that it is a fine little class B(ish) amplifier.
