# Error in resonant converter simulation

I designed a closed loop resonant buck converter using voltage mode control and simulated on PSIM. Here is my circuit:-

This gave correct results. Now I want to design an input filter so I simulated on LTSpice. In this circuit I had initially put a pulse voltage source at the Gate of the IRF530 and it was alright. Now I made the same circuit as in PSIM for the voltage feedback, but it is giving very wrong output waveforms.

Here since I used LISN modules I did not ground the converter circuit instead it is all connected to the "n" label which is the eut point of a LISN box. C7 without this feedback was 4.7uF, but here in this circuit I changed it widely but the waveforms were all wrong. I will replace C7 by a damped filter. But first of all I need it to work as per the PSIM circuit before designing filter.

I know the problem lies in the feedback part because when I remove the feedback and put a pulse source, keeping the rest intact including the resonant components, I get perfect ZCS.

Also, if in the circuit in Ltspice (the image of which is attached) I remove the LISN blocks to make it absolutely same as in PSIM circuit, I still get erroneous waveforms.

EDIT 1:- Here is the circuit without the LISN module, exactly the same as PSIM. Here I replaced the diode and MOSFET as ideal devices, but still not working.

• Don't know if this is your issue, but the Middlebrook criterion states that an input filter to a SMPS must have lower output impedance than the input impedance of the converter for all frequencies where the control loop has gain. Otherwise it will be unstable at the frequency where the input filter impedance peaks. Removing the feedback and using a pulse also removes the incremental negative input impedance of the buck, so it would be expected to solve the problem. Dec 29 '20 at 19:18
• @JohnD Thank you for replying.The converter is a closed-loop one, so I cannot actually remove the feedback (it's ok for simulation purposes).My issue is that I'm not getting the correct simulation for closed loop on ltspice even when I follow my PSIM circuit, regardless of the filter part.
– SM32
Dec 29 '20 at 19:24
• Yeah, I know you can't remove the feedback in practice, I was just pointing out that the fact that doing so in simulation fixed the issue is consistent with the possibility of violating the Middlebrook criterion. However, you're right, you have to get the basic circuit working in LTSPICE without the filter before worrying about the filter response. Dec 29 '20 at 19:28
• I would physically open the loop and bias the control input of your buck with a dc value for the correct operating point and then superimpose a small pulse to generate a control step. Then do the same in PSIM and compare the two output responses. If they aren't identical, there is a modeling issue or one of the simulator is wrong. Also, even if the LISN ouput impedance is supposed to be flat at 50 ohms, I would start with a simple dc source as in PSIM. Dec 29 '20 at 19:48
• I would also get rid of the 20-µF capacitor you have in parallel with the 10-ohm injection resistor. For a type 2 compensator, there is no need for this cap. and the 10-ohm resistance can stay undecoupled without problem. Dec 29 '20 at 19:51

1. this is a voltage-mode converter and its phase response lags to 180°. A type 2 compensator won't suffice as it can only provide a 90° phase boost. You need to go for a type 3 version which can boost up to a theoretical 180°.

2. when you simulate a switching cell, whether this is a boost, buck or buck-boost, you need to include a cycle-by-cycle current limit otherwise, the inductor current will overshoot big time at start-up and it is likely to lengthen simulation time until the inductor current lands. You need to slightly complicates the application circuit and include a current limit.

I use SIMPLIS rather than PSIM on switching converters. The first one is purposely designed for simulating switching power supplies and extract the small-signal ac response without resorting to an averaged model. PSIM also provides this option but in a less flexible way in my opinion as the modulating source amplitude matters where it doesn't with SIMPLIS. For your information, I have released a set of 60+ ready-to-simulate SIMPLIS switching templates for the support of my next book on small-signal modeling of switching converters (tentative TOC is here). I have used the auto-compensated buck VM circuit to which I added your resonant components. I biffed up a little the output capacitor to 470 µF as you can see below:

If you run the ac analysis, you obtain the steady-state operating waveforms confirming a 5-V output. Once compensated, crossover is 10 kHz with a phase margin of 86°.

A transient step can now be run to check the response from 5 A to 10 A in 1 µs:

For your information, the macro computed the following compensation values:

• Rupper = 3000
• Rlower = 1000
• R2 = 1229.55743937226
• R3 = 157.894736842105
• C3 = 1.00798130624867e-08
• C2 = 6.19714952219388e-09
• C1 = 2.58881672373355e-08
• Boost = 100
• Fz1 = 5000
• Fz2 = 5000
• Fp1 = 25887.1571878507
• Fp2 = 100000
• I upvoted but didn't accept your answer as I had some doubts. I see your reasoning of the type-3 compensator now, but how come PSIM gave the right results? I wrote the MATLAB code for this too for verifying from bode plots, and it was right, PM ~=65 deg.The only reason I didn't continue using PSIM and switched to LTSpice was 1)real-world components 2)PSIM sawtooth voltage is grounded & I couldn't use triangle wave to do it. In LTSpice I get very very wrong answers, although now I'll try your way of type-3 compensator
– SM32
Dec 31 '20 at 19:31
• Thank you for the upvote. I selected a type 3 because you need to choose crossover at least 3-4 times the resonant frequency so that you have sufficient gain to damp oscillations of the output $LC$ filter. The phase lag at this 10-kHz crossover required a type 3 as the type 2 could not boost the phase enough. Also, as I explained in the answer, you need to include a current limit and even a rudimentary soft-start to prevent a start-up overshoot. Jan 1 at 11:11