Signed number multiplication on FPGA

Question

I am trying to multiply signed numbers on a Nexys A7-100T FPGA development board with VHDL.

See Reference manual webpage link for the FPGA board hardware information.

Also see this link (begins page 78) for Vivado's Vivado design synthesis guide user VGDL guide which shows how to use the hardware multiplier logic.

I know this will work for unsigned numbers but can this be used for signed numbers with some additional logic / code?

I also have looked at the complex multiplier within this document however I am totally unfamiliar with the concept behind it?

How do people use the multiplier hardware to multiply signed numbers?

Answer 1

The Vivado synthesiser is smart. You have to declare the operands as signed. If the operands are unsigned, explicitly type cast all of them to signed and then simply multiply using *. It should infer a signed DSP multiplier on synthesis.

If it's not inferring automatically (can be due to multiple reasons), then you may have to use USE_DSP attribute to force the synthesiser to map the multiplication logic to DSP slice.

Page 61, Vivado Synthesis Guide

Answer 2

I'm not sure if it's (even close to) the best way, but when I needed to do this, I checked the signs of the two numbers, ran that through an XOR, and stashed it in a flop. Then I took the absolute values of both operands, multiplied those, and then if my saved bit from the XOR was set, negated the result.