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I am analysing the amplifier circuit drawn in the Art of Electronics 3rd edition (p. 121) and, while I follow the analysis presented and understand all the calculations in the text, I encountered an issue related to opening the feedback path. In particular, I don't seem to be able to wrap my head around what happens DCwise when I ground the right side of R6 (see circuit attached) as indicated for the open loop gain and impedance analysis in the text. This appears to reduce by a factor of 10 the current through the collector load of Q3, as a consequence of a tenfold drop in base current for Q3 (from ≈ 70μA to ≈ 7μA). It follows that the voltages in the output section are all negative (base of Q4 and Q5 of about -11.1V and -13.1V respectively). All appears to be caused by a 0.5μA increase of base current for Q2; current across R2 does not change having the feeback path open or closed. I do not understand how opening the feedback path results in such a significant move away from 0V DC quiesent voltage output, and I can't seem to figure out how to derive mathematically the values that I measure in my simulation. Can anyone please point me in the right direction?

I purposefully used output transistors with very similar hFE for pnp and npn to exclude that as a reason of asymmetry. A resistor value for R6 of 140kΩ appears to bring both output transistor bases where they are when feedback is present(+/-1V; a 230Ω Q2 collector resistor to match the parallel resistance of R3 and the base impedance of Q3 at 10mA reduces even further the DC offset at the output).

enter image description here

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  • \$\begingroup\$ Instead of connecting it directly to ground, connect it to a few milli volts (variable) that can be plus or minus with respect to ground. Or, reconnect it to the output and precisely measure what the output voltage is and then use that small (but non-zero-volts) voltage as you grounding voltage. Input offset variations and limited loop-gain mean it will never be perfectly zero volts. \$\endgroup\$
    – Andy aka
    Jan 2, 2021 at 16:24
  • \$\begingroup\$ Did R6 start out connected to the junction of R4 and R7? \$\endgroup\$
    – TimWescott
    Jan 2, 2021 at 17:29
  • \$\begingroup\$ But if you want to calculate the open-loop gain your calculation should be based on the DC situation when the feedback loop is closed not open. You open the feedback path "in your mind" no in a real circuit. See another example from AOE electronics.stackexchange.com/questions/481182/… \$\endgroup\$
    – G36
    Jan 2, 2021 at 17:37
  • \$\begingroup\$ FYI if you have matched output transistors your BCW60A Rce is 11 ohms max and 2N5401 Rce(sat) is 10 ohms max so Re (R4,R7) only needs to be 10% of this which gives you a lower Zout and better damping factor. Thus change 5 to 1 Ohm. D3 may need to be improved for Iq. Then of course return 100k to output. \$\endgroup\$ Jan 2, 2021 at 18:02

3 Answers 3

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Intro

You write:

I can't seem to figure out how to derive mathematically the values that I measure in my simulation.

It's easy to suck me into anything mathematical. I admit it. So it'll be a joy to focus on a few initial steps in working out a quantitative answer.

But I already know we'll run quickly into difficulties with the unknown quiescent state of the supposedly class-AB output stage. And that's where I'll need to stop. Still, I want to give you an idea of how to get started. And I'll do this as a stream-of-consciousness and later see if any of what I write can be confirmed, running Spice.

As a segue, the base-emitter voltage of \$Q_3\$ isn't a constant. Many may try to simplify their thinking and analyze the open-loop on that assumption. Assuming that a later Spice run I'm considering confirms the theory I'll apply below now, I shall prove it is not the case and that it's important for any truly quantitative analysis that you also do not assume it is constant.

So let's start.

Early Effect, Without \$Q_3\$ Loading

Identical results should be expected from Spice simulators using identical BJT models in identical situations. I think you already surmised this fact and perhaps this is why you are curious. But your circuit doesn't actually place the 2SC4081 BJTs (\$Q_1\$ and \$Q_2\$) in identical situations. \$Q_1\$ has a resistor in its collector leg; \$Q_2\$ does not. To my mind, this immediately brings up the Early Effect as now the collector voltage will not be the same with both BJTs. (I think you can easily see why.)

So there will already be a small imbalance in collector currents even with identical base voltages. In this case, I'd expect to see \$Q_2\$'s collector current as slightly higher than \$Q_1\$'s collector current (due to how the Early Effect impacts collector currents.)

But by exactly how much? (This isn't immediately obvious, as the following will show.)

Spying at the model found in LTspice for the 2SC4081, I see a model value of \$VA\approx 114\$. So I'd expect a difference of about:

$$100\%-\frac{114\:\text{V}+15\:\text{V}-\left(-620\:\text{mV}\right)}{114\:\text{V}+\left(15\:\text{V}-620\:\text{mV}\right)-\left(-620\:\text{mV}\right)}\approx 0.5\%$$

(Note: I used an assumed \$620\:\text{mV}\$ imagining approximately \$1\:\text{mA}\$ in each collector of the diff-pair. But feel free to vary it a little around that value. You'll see the same percentage arrive. So we can be comfortable with this result.)

This minor imbalance won't impact the base voltage of \$Q_3\$ much. In fact, the impact will be less than initially suggested below, before a negative feedback is applied. But there is a difference. And since there is a difference, let's analyze it. (It's complicated enough to be worth a moment.)

As mentioned parenthetically just a moment ago, assuming about \$1\:\text{mA}\$ in each collector, if perfectly balanced, implies a base-emitter voltage on the 2N5401 BJT (\$Q_3\$) of \$620\:\text{mV}\$.

Without any negative feedback to account for (we'll get to that), the Early Effect alone suggests that the 2N5401 will instead have \$620\:\text{mV}\cdot 99.5\% =616.9\:\text{mV}\$ across its base-emitter junction. That's a change of \$-3.1\:\text{mV}\$ due to the Early Effect when compared to an idealized situation without the Early Effect -- but at this moment still without any loading by \$Q_3\$ taken into account.

Early Effect, With \$Q_3\$ Loading

But there is a negative feedback due to changes in \$Q_3\$'s loading in response to the Early Effect. This was missed above because the computation assumed that \$Q_3\$'s base current didn't load \$Q_1\$'s collector. We know that's not true.

So let's follow the logic to its conclusion. While we are starting with the idea of \$-3.1\:\text{mV}\$ change at the base voltage for \$Q_3\$, there's a negative feedback due to the fact that a reduced \$Q_1\$ collector current implies a reduced base-emitter voltage for \$Q_3\$, which implies a lower base current in \$Q_3\$, which implies less loading on \$Q_1\$'s collector, which finally implies more current returned to \$R_3\$, and therefore more of a voltage drop across \$R_3\$; these results then countering the Early Effect and providing that negative feedback I mentioned.

I won't bore you with the calculus details of the sensitivity equation here, unless you ask for them, but the net effect is that in this case the sensitivity equation gives us about a factor of \$5\$. That factor is applied to the change in \$Q_1\$'s collector current, \$\%\,I_{\text{C}_1}=\frac{\text{d}\,I_{\text{C}_1}}{I_{\text{C}_1}}=-0.5\%\$.

So we should then expect about \$\%\,I_{\text{C}_3}=\frac{\text{d}\,I_{\text{C}_3}}{I_{\text{C}_3}}=5\cdot \frac{\text{d}\,I_{\text{C}_1}}{I_{\text{C}_1}}=5\cdot\%\,I_{\text{C}_1}=-2.5\%\$. This takes into account all of the negative feedback effects due to \$Q_3\$'s loading on \$Q_1\$'s collector current and provides the net \$Q_1\$ and \$Q_2\$ Early Effect on \$Q_3\$'s collector current (ignoring the Early Effect on \$Q_3\$, itself.)

So that's the prediction: differences in the Early Effect between \$Q_1\$ and \$Q_2\$, due to the presence of \$R_3\$, will impact the collector current of \$Q_3\$ by \$-2.5\%\$.

What Does LTspice Say: Confirm or Deny?

Now that I've started you down the path of a quantitative, mathematical analysis, let's see what LTspice actually says about the above calculations I made.

(I did not try LTspice before writing anything up to this point. I'm that confident. But I also make mistakes and so I'm not sure, at all, how things will actually play out in LTspice. So I'm perhaps as curious as you are.)

enter image description here

The idea above is to set up two different models for the 2SC4081. One of them with the nominal value for the Early Effect for the 2SC4081 and another one with the Early Effect neutralized. Then perform two runs and compare their results.

Let's use the captured numbers, shown at bottom in the above capture, and see what we get:

$$\frac{871.05\:\mu\text{A}}{893.336\:\mu\text{A}}\approx 0.975$$

That's exactly the result, as predicted.

Summary

So, I think this shows that you actually can analyze things quantitatively. However, it's non-trivial and requires a variety of skills.

Keep in mind you were attempting an open-loop calculation. Normally, a designer will use (in fact, profoundly rely upon) the use of crafted negative feedback (not just the inadvertent negative feeedback I analyzed above) to cause a discrete circuit to operate within 5-10 percent of the design goals, over the range of operating conditions. So these kinds of detailed calculations I performed above are rarely, if ever, applied.

Now, this is where I stop. I mostly wanted to make the point that you can analyze a circuit and, if you apply enough thinking tools, then you will come credibly close to what Spice will show you. But design efforts are usually not a matter of nailing every decimal point -- leaving that for Spice -- but instead to focus on a bullet-proof design that will work over part and temperature and long term drift variations. Then, Spice is just used to make sure there wasn't some obvious mistake and also to verify that the rough estimates are in the right ballpark.

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  • \$\begingroup\$ this once again has been extremely helpful. Please do bore me with the details on the calculus of the sensitivity equation (which I have not heard of before). My rather poor attempt to figure out changes in collector current \$I_{C3}\$ was to use the Ebers-Moll equations with the two values of base voltage derived with and without the Early effect. That gave me a collector current change of approximately 12-13%, although that does not account for the differences in loading for the collector of \$Q_1\$. \$\endgroup\$
    – MattiaM
    Jan 3, 2021 at 10:47
  • \$\begingroup\$ On another note, one of the things that I had already noticed initially was that the load of \$Q_1\$ (i.e. the parallel combination of \$R_3\$ and the impedance into the base of \$Q_3\$) is dominated by the impedance looking into the base of \$Q_3\$ rather than by \$R_3\$, especailly at the 10mA quiescent current when feedback is in place. This obviously causes (excessive?) loading of \$Q_1\$ from \$Q_3\$. Is this a case of bad design, or not? I will try to add emitter degeneration on \$Q_3\$ and see how that changes the operation of the circuit. \$\endgroup\$
    – MattiaM
    Jan 3, 2021 at 10:48
  • \$\begingroup\$ @MattiaM The sensitivity equation is highly dependent on model parameters used by LTspice. After looking (again) over what I'd written down and used in order to get my estimate of 5 (I actually got about 5.4) and how sensitive the expression itself is to those model parameters (which by the way emphasizes your thoughts about using emitter degeneration, which would reduce these vagaries substantially) I've decided I'd rather not write it out. It's long and would require a lot of "this is what LTspice uses as parameters, so that's why..." explanation. It would be annoying. \$\endgroup\$
    – jonk
    Jan 3, 2021 at 21:37
  • \$\begingroup\$ @MattiaM If you do add degeneration, you'll need to modify that diff-pair collector resistor value for obvious reasons. \$\endgroup\$
    – jonk
    Jan 3, 2021 at 21:38
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Think about what the open-loop vulnerability of the circuit is if the voltage in the purple box below changed a tiny amount: -

enter image description here

I calculated the voltage (0.656 volts) from assumptions on other voltages in your circuit but, if I am out by a couple of milli-volt (and I surely will be) then how much will that change Q3's collector current.

You are expecting perfection when running open-loop and this won't happen (simulation or reality) - when you are closed-loop, the DC quiescent voltage at the output might be within a few milli-volts of 0 volts BUT, it won't be 0 volts. The voltage will be close but not exactly 0 volts. So, when you tie R6 to 0 volts (opening the feedback loop), you will get a massive shift in quiescent conditions due to the open loop gain of over 1000.

Put R6 back into close-loop and inspect the voltage at the output. Then use that DC voltage to feed the right-hand side of R6. It then should be much closer to what you expect.

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There will be input bias currents (base currents) pulled into the bases of Q1 & Q2 which will cause voltage drops across the high value base resistors R1 & R6. Therefore the bases of Q1 & Q2 will sit at a volt or so below 0V with their emitters about 0.7V below that. This will cause a constant current to flow through R2 which will be split equally between the input transistors' collectors.

R3 has a fixed 0.7V across it causing a fixed current to flow through it and R2 & R3 are sized so that the Q1's collector current is slightly larger than the current through R3. The difference between these two currents must be pulled from the base of Q3 causing a current of hFE times this base current to flow in the collector of Q3. The collector current of Q3 causes a fixed voltage to be dropped across R8 forcing the circuit's output to a certain voltage.

If the collector current of Q1 is exactly equal to the current through R3 then there will be no base current pulled from the base of Q3, Q3 will be turned off and the circuit's output will saturate negatively.

I have assumed perfectly matched (ideal) transistors.

In a closed loop situation, consider when the output is at a voltage which causes the collector current of Q1 to be equal to the current through R3. There will be no base current pulled from Q3 and so the output will start to drop but it only needs to drop a tiny amount before feedback reduces the Vbe of Q2 which increases the collector current in Q1 which pulls some base current out of Q3 which stops the output falling any further. The output has stabalised at a voltage very close to 0V in order to keep the base-emitter voltages of the input pair close in value.

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