is there a place where i can get the actual implementation of a component diagram such as the one below?

Usually the tutorial are high level and dont provide any details of how the connections are actually implemented. SPIxBUF is said to be an interface register which writes and reads to ther FIFO. Exactly how is this implemented? I can only guess that it involves controls signals and mux addressing

Anyone have any resources? Will the implementation details usually be provided from a book in which the diagram is taken from?

Im reading references from Xilinx and it really doesnt provide these details just mainly the functionality, any help is appreciated thank you

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  • 1
    \$\begingroup\$ The block diagram could be implemented in infinitely different ways. The point is not the implementation but how it works. You can build any FIFO with any interface you want. Here it is just the software that can write to FIFO and if there is stuff the SPI peripheral empties it and transmits data. Received data goes into FIFO that the software can then read. What kind of control signals there are is up to the implementation. Separate FIFO chips do exist, like 74LS222 or 74LS224 so you can read their datasheets. \$\endgroup\$
    – Justme
    Commented Jan 4, 2021 at 9:11

2 Answers 2


is there a place where i can get the actual implementation of a component diagram such as the one below?

You hire a developer to implement that diagram.

I mean, this is quite literally hardware design: What you're asking for is "how does the silicon work?"

You're in the usual trap of "I think this abstraction is too much high-level, but I don't have the low-level understanding yet"; so, you'd probably want to take a course on digital circuit design, maybe one on VLSI, one on fundamental methods in IC design, and, considering this is from a microcontroller, on design for systems on chip.

You won't ever meet exactly that diagram in one of these courses, but they'd give you a sufficient understanding of how such things can be implemented.

But: It's not likely that the person who implemented this block diagram in hardware needed all that knowledge; for example, these FIFOs are FIFOs. There's a good chance the designer didn't come up with their own, but just let the design software implement one. The interface to the internal bus? Definitely done a hundred times in the same company. There's a ready-to-use block of interface logic that you'll just use.

Abstractions are your friend.

This block diagram is an abstraction that is (hopefully) detailed enough for any user of that IC (and reading your previous question, it might still be too detailed for you, which can be a good thing!).

A verification engineer might want to know about timings in a few of these components (at a time), but then he'd stop caring about how this integrates with the rest of the microcontroller or software (as that would only make his head swirl – the interface block's timing is known, it's verified it works, so only test what's "south" of that at a time; can't test arbitrarily large things). So, he's going down one abstraction layer, but then loses the ability to work with the higher level (software behaviour).

A digital logic might not care at all about this being some functional unit in some microcontroller – what they care about is how the functional description (which includes that SPI unit block diagram you've shown) translates into a hardware description language. She (or he) would never ever work at the full system level – that's far too huge for any human to ever grasp at once. You'd always rely on well-defined interfaces between functional units, so that you can "abstract away" all the other building blocks that make up a microcontroller. So, they lose a layer of "overview" but go deeper into the digital logic side (which is a different "breaking" of abstraction than the verification engineer does!).

Someone who designs the silicon will throw the digital designers' (usually there's many working on one project, things just being too big for a single person) hardware description language at their synthesizer software, their automatic technology mapper and place'n'route software and try to understand and tweak the result. They will be looking at standard cells, rarely also at individual transistors. They stand absolutely no chance understanding how, say, the CPU works, from the level of detail they look at. They might be looking at some combination of standard cells and say "oh, this is a simple state machine", or a very repititively structured area and say "ah, that's where the thing put the caches", but the logic as is will be impossible to see at that level.

Abstractions are everyone's friend

While very easy to illustrate at such highly complex, miniature things as ICs, you'll find the same concept everywhere:

The people developing vaccines don't need to be good physicians; they're not treating people as a whole, they are trying to make people's immune system react in a certain way reliably. They don't need to be good chemists or physicists, either, since while all material is made up from molecules, the "oh and here I have this bunch of electrons with a kind of unsharp function that describes the probabilities of them realizing in a certain position" level of detailedness really won't help when e.g. trying to understand a 10000-molecule piece of RNA.

You don't want the foreman on a construction site to be an expert in city planning; his job is looking towards this one building getting built correctly. That's hard enough. You don't need him to be an expert in welding of intricate structural steel joints, either – that's the welder's job, and focusing on that would steal time from the foreman's capacity in supervising the rest of the workforce and material flow.

You don't want your cook to be a global food supply chain logistics expert, but also not a nutritional biochemist. And so on...


Yes there is. To actually find it, go to wherever you found this diagram.

If it's someone's proprietary IP, and not published, look for other similar IP that IS published.

Most FPGA manufacturers want to encourage people to use their products, so many of them publish IP like this, including the actual implementation in the form of VHDL source code.

Since you mention Xilinx : you may have to go to some "customise this IP" process and press a "generate" button, and then find out where it placed the files. There will certainly be documents describing this process and tutorials walking you through it.


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