In the CB configuration, a signal is applied to the emitter to create an in-phase amplification at the collector. I am confused, however, on how exactly this happens. In the picture below, if the input signal raises the emitter voltage on the positive swing, it would mean that there is a larger voltage across the emitter resistor, which by Ohm's law entails a larger current and thus a larger voltage drop at the collector resistor. For an in-phase amplification to happen, there needs to be less current at the collector, which means I am failing to understand this configuration. Can anyone please help clear the fog?
jm567 - perhaps you have forgotten that the collector current depends on the base-emitter voltage. It is the well-known exponential relation Ic=f(Vbe). When the base voltage Vb remains fixed and the emitter voltage Ve increases, the voltage difference Vb-Ve=Vbe decreases - and with it the collector current. As a consequence, the collector voltage increases.
Comment 1 (Edit): I like to take the chance for comparing the two possible explanations for controlling the collector current in a common-base stage:
(1) An externally applied RISING signal voltage at the emitter node will REDUCE the voltage Vbe and, therefore, REDUCE the emitter current according to Ie=f[exp(Vbe/Vt)]. Because of Ie=Ib+Ic both currents, Ib and Ic, will also DECREASE by the same exponenetial expression. This is because there is a nearly constant relationship between Ic and Ib (beta).
(2) An externally applied RISING signal voltage will cause a corresponding (small) current change delta(ib) from the emitter to the base (thereby REDUCING the postive DC base bias current +Ib in opposite direction) - however, this small base current change delta(ib) is part of a larger current change delta(ie) because of delta(ie)=delta(ib)+delta(ic).
I think, it is obvious that delta(ib) is NOT the physical reason for delta(ic). All the currents change at the same time due to Vbe change in the same direction.
Comment 2: I must admit that I really cannot understand some parts of the discussion about the "common base amplifier confusion" (title). The questioner could not see how the collector current will decrease when the voltage at the emitter node of the shown circuit increases (due to an input signal).
Is there any doubt that the transistor will allow an emitter current Ie when the device is "opened" with a voltage Vbe=0.7V and that this current Ie is split into Ie=Ib+Ic? Is there any doubt that this current will be smaller for Vbe=0.65 V ? So - what is the problem? The voltage Vbe=Vb-Ve will be reduced when the emitter voltage Ve is slightly increased due to the input voltage Vi at the emitter node. As a consequence, all three currents (Ie,Ib,Ic) will - according to Ie=Ib+Ic - decrease. Thats all!
I cannot understand why - according to a written comment below - this view should be "misleading"?
In other words,
Increasing Ie (f) externally, with Vb shunted by C Reduces Ib(f)=Ie(f)/hFE which reduces Ic(f) * hFE .
Thus increasing Ie reduces Ic from external f driver. The voltage drop across Rc wrt. Vcc or rises wrt. Gnd. Thus in phase with Ve/Re=Ie
Reducing Ic/Ib with rising Ie(f) thus produces voltage gain= + Rc/Re for the common base.
The advantage here is the Current gain = -1 so the BW = GBW max yet the voltage gain still exists without BW reduction.
The disadvantage is low input impedance demands a current source driver for input or voltage source with a lower AC drive impedance.(?)
To consider the collector current, we want to look at the base current because we can safely assume \$I_C=\beta I_B\$ where \$\beta\$ is a constant.
Apply KVL to the B-E loop,
where for your circuit,
\$I_i\$ is assumed to be the input current
Initially, \$I_i\$ is 0. With the increase of \$V_i\$, \$I_i\$ becomes positive and this gives a reduced \$I_B\$ (from the KVL equation above). With smaller base current \$I_B\$, we can conclude that the collector current \$I_C\$ is decreased.
Common base circuits are usually best explained in terms of emitter current control. Also, using a PNP makes it clearer to explain because it avoids 'collisions' between bias and incremental current directions. Let's start with a conceptual schematic of a PNP transistor in common base configuration, drawn as it usually appears on your run-of-the-mill textbook
This configuration illustrates the concept behind the (apocryphal) naming of the transistor as 'transfer resistor': a moderate current Ie into a small input resistance (it's about re as seen from the emitter) is turned into a roughly equal current Ic into a different load resistance Rload (=Rc). If Rc>>re, the small incremental input voltage (represented by 'signal' in the above picture) is turned into a much bigger incremental output voltage across Rc.
Seen this way, it should be clear that Ie and Ic are necessarily in phase, and so is Vout when measured across RLoad with the polarity as shown: you increase Ie, this makes Ic increase and so does VRload= Vout. The incremental voltages sit on top of the bias voltages, much in the same way the incremental currents sit on top of the bias currents but by using a PNP we have no problems in juggling the signs, since increasing vin (signal) will cause an increase in Ie (the total emitter current, sum of bias and incremental currents IE + ie) and thus an increase in Ic and in Vout.
Common base PNP
We can see this in a simulation. Here I use a topology similar to the conceptual circuit above:
This circuit will give you a whooping voltage gain of more than 350x. I am not claiming this to be a useful practical circuit as it is, but it helps showing the variables in the circuit. To begin with, input and output voltages are in phase - as intuitively expected
Then the following plot makes it evident that the currents at the circled node distribute as expected according to the Re // re current divider.
I fixed the signs in LTSpice (transistor currents are conventionally positive when entering the device) in order to show Iin entering the node, and Ie and IRe exiting it. You should notice that these are the total currents, sum of the bias and signal currents. The interesting part is that the bias current goes through the transistor and RE (can't cross the capacitor barrier) while the signal current iin, is almost entirely going from the voltage source (through the 'transparent' capacitor) through the transistor. Nearly nothing goes into Re.
The reason for this is that the input current sees a current divider formed by Re and the input resistance offered by the transistor which is re = VT / IE. In this case, with VT=25mV and IE about 0.5mA we get an re of 50 ohms. RE is 2kohms so it won't see almost any current at all.
The key takeaway here, and what might have confused you at first, is that the signal current is going into the transistor and not into Re. So, when the input voltage increases, the incremental current through the transistor increases and so does the incremental current through the output resistor (Ic = Ie, basically).
Common base NPN
When we convert the circuit to an NPN common base circuit, we have to invert the polarity of the bias voltages and this makes room for some confusion. Here is the circuit:
Now the bias current goes the other way (exiting the emitter), so when you increase the input voltage you inject an incremental emitter current that reduces the total emitter current Ie = IE + ie. But the load still sees an incremental collector current in phase with the emitter current (they are basically the same current). Again, the simulation confirms that the input and output voltages are in phase:
Draw it differently
Instead of showing the currents (that are basically the same as before, only with different signs), here is the circuit drawn vertically with the bias voltage referenced to the same ground of the signal source placed across Re. This is the topology used in your circuit.
Signals are mostly the same as before, what changes is the level of bias they sit on.
In this circuit too, the important thing to notice is that the incremental input current sees a current divider formed by Re (2kohm) and re (a handful of ohms) and (when the signal voltage is positive) almost all of it will go 'up' through the transistor, opposing the bias current IE and reducing the total currents Ie and Ic. A lower overall Ic means a lower overall voltage drop across Rc and in turn this implies an overall higher value for Vout.
It's bit harder to see it with an NPN because bias and signal are fighting.
Common emitter and common base are formal terms; common collector is even meaningless. For the last time, I came to this conclusion during yesterday's laboratory exercise dedicated to these basic transistor circuits.
Looking for a meaningful classification
To explain to my students what lies behind these names, I used my favorite transistor setup - Fig. 1.
Fig. 1. A setup for investigating basic transistor stages.
It was extremely simple - two voltages (Vb and Ve) were produced by 1 k potentiometers (P1 and P2) and applied to the base and emitter of the transistor... and a LED was connected in series to the collector resistor Rc. The voltages were measured by voltmeters (V1 and V2) and the collector current (transistor state) was indicated by the LED. In addition, in the colorful circuit diagram drawn on the blackboard, the voltages were represented by voltage bars with proportional height (in red)... and the currents - by current loops with related thickness. To see what makes sense in the meaningless classification, we conducted a few experiments varying the one, other or both voltages. We also conducted experiments by shunting the potentiometer outputs with a big electrolytic capacitor...
1. Base-driven (common-emitter) stage. We set P2 wiper at zero position (Ve =0) and began carefully moving up the P1 wiper from the zero position (Vb was increasing). From one moment on (Vb = 0.6 V), the LED gradually started to light up (aha ... the transistor started to conduct current in active mode). We even wiggled P1 slider in a sinusoidal manner around these 0.6 V (bias voltage). Eventually the LED began to glow constantly (clearly, the transistor was "saturated").
Then we moved the P2 wiper at some nonzero position (Ve = const) and repeated the experiments above...
2. Emitter-driven (common-base) stage. Now we swapped the roles - set P1 wiper at some nonzero position (Vb = const) and began carefully moving the P2 wiper around Vb - 0.6 V. Now the LED (collector current) was behaving in the opposite way... but the collector voltage in the same way (OP's question). It was amazing that Vc did not reach the ground...
3. Base-driven with negative feedback (common-collector) stage. Now we disconnected the upper P2 end from Vcc and the transistor began itself producing Ve by passing its collector current through the lower part of P2. The students were impressed with how the transistor itself was "moving" the voltage of its emitter so that it would follow Vb.
4. Base-emitter driven (differential) stage. Finally, we decided to vary both input voltages - in an opposite direction (differential mode) or in the same direction (common mode). In this way, my students got an idea of how the simplest comparator and differential amplifier can be made.
So, what is the difference between the two classifications?
Actually, there is always only one input voltage Vbe that is applied between the base and emitter (across the base-emitter junction). In most applications, it is floating... but, as a rule, in circuits, input voltages should be grounded (single ended). That is why, for greater versatility and flexibility, we form Vbe as a difference between two input voltages (Vbe = Vb - Ve)... and then vary the one, other or both. We have two ways to name these configurations:
In the classic centuries old classification, we give the name of the configuration according to which of the transistor terminals is with a fixed voltage (AC grounded, passive, neutral). But it is the less important terminal, especially in the case of the so-called "common collector" (the bare fact that the collector is AC grounded does not mean anything since the input voltage is not applied between the base and collector). In the differential stage there is no such AC grounded terminal at all.
In the suggested (just fabricated) classification, we give the name of the configuration according to which of the transistor terminals is driven by the input voltage (active)... implicitly assuming that the other terminal is with a fixed voltage (AC grounded).
Making a connection
Now, when my students ask me, "What is actually the common-emitter stage?", I will answer them: "This is a stage where we drive the transistor from the side of the base while keeping the emitter voltage constant"...
... common-base? -> "...driving the transistor from the side of the emitter while keeping the base voltage constant"...
... common-collector? -> "...driving the transistor from the side of the base while it changes its emitter voltage so that to keep it equal to the base voltage"...
... differential amplifier? -> "...driving the transistor both from the side of the base and emitter"...
Why CB stage does not invert
Think of the output circuit as of a voltage divider of two resistors - constant (Rc) and voltage-controlled variable "resistor" (Rce).
CB stage: When we increase Ve, Vbe decreases (since Vb = const) -> Rce increases -> Ic decreases -> Vce increases. So, the CB stage does not invert the input voltage.
CE stage: When we increase Vb, Vbe increases (since Ve = const) -> Rce decreases -> Ic increases -> Vce decreases. So, CE stage inverts the input voltage.
It is so amazing how such a simple electrical phenomenon can be explained in such a formal way (excluding to some extent LvW's explanation)... There is a need for a simple qualitative explanation here. It can be done through a simple electrical equivalent circuit of a voltage divider consisting of two resistors - constant and variable (rheostat). The latter can be made by a potentiometer by using the partial resistance between the wiper and one of the end terminals. As early as the 19th century it was known that if we increase the variable resistance (moving the rheostat's wiper up), the voltage across it will increase and v.v., if we decrease the resistance (moving the wiper down), the voltage will decrease. If we use the other end terminal, the relation will be reversed - if we move the wiper up, both resistance and voltage will decrease and v.v., if we move it down, they will increase.
Now it only remains to replace the manually-controlled rheostat with a "voltage-controlled resistor" (BJT, FET) and we will obtain today's amplifying stages. For some (unknown for me) reason, all they behave like a "reversed rheostat" - when we increase the input voltage, their resistance decreases and v.v.
Indeed, they have non-linear resistance (seen from their horizontal output IV curves) but this is irrelevant for the purposes of our question. The only important thing here is that this is a resistance controlled by the input voltage…
Is it a current source?
Contrary to the conventional representation of the transistor as a current source, I will answer:
No… it is not a current source in the literal sense of the word (device producing electricity)... and in the ordinary human sense. Indeed, it is an element keeping up a constant current… but how does it do this magic? How can be a current changed in a circuit supplied by a constant voltage? The only way is by changing the resistance. So the main property of this element is "resistance" (in the broad sense of the word).
To truly understand this circuit, you need to imagine where the currents flow and what voltage drops they create for three typical cases of the input voltage - zero, positive and negative. For this purpose, the currents are visualized by full closed paths (loops) with related thickness (in green) and the voltages - by voltage bars with proportional height (in red). The current directions and voltage polarities are real.
For simplicity, I have replaced the bias voltage divider R1-R2 and the decoupling capacitor Cb with a voltage source Vb. The coupling capacitors Ce and Cb have large enough capacitances so the voltages across them do not significantly change when the currents flow through them. The input voltage VIN is represented by a variable battery and the load - by a resistance RL.
Vin = 0 (charging the "batteries"). In terms of DC mode, the CB stage is a CE stage with current negative feedback (emitter degeneration) driven by a constant input voltage Vb - Fig. 2. In this way, the needed initial (quiescent) emitter Ve0 and collector Vc0 voltages are set.
Фиг. 2. CB stage at zero input voltage
When the power is turned on, the capacitors, like "rechargeable batteries" begin to charge: Ce charges through the input voltage source (+Vcc -> Rc -> Tce ->Ce -> Vin -> -Vcc); Cc charges through the load (+Vcc -> Rc -> Cc -> RL -> -Vcc). Note the charging is not shown in Fig. 2 above; only the final result is shown. This process requires both the input source and load to be "galvanic" (DC conductive)... i.e., the input source is a "piece of wire" and the load has a low enough resistance. Thus, at the end of this initial part, the capacitors have copied the according initial DC voltages (VCe = Ve0 and VCc = Vc0).
Vin > 0. During the positive half wave, the input voltage is added in series to the voltage of the input coupling capacitor Ce and the total voltage Vin + VCe of this "composite battery" exceeds the quiescent emitter voltage Ve0 - Fig. 3. So, an input current Iin begins flowing through the input capacitor in a direction +Vin -> Ce -> Re -> -Vin.
Фиг. 3. CB stage at positive input voltage
Since the capacitance Ce is large enough, the capacitor is slightly discharged and the voltage across it does not change noticeably; so the positive input variations appear at the emitter (figuratively speaking, the charged capacitor "shifts up" the positive input voltage). As the base voltage is constant, the transistor is driven in an opposite manner compared to the CE stage, and the collector voltage changes in the same direction. Since it exceeds the voltage VCc across the output capacitor, a load current IL begins flowing through the output capacitor in a direction +Vcc -> Rc -> Cc -> RL -> -Vcc. The capacitance Cc is large enough... the voltage Vc0 across it does not change noticeably... so the positive collector variations appear at the load. Figuratively speaking, the charged capacitor Cc "shifts down" with Vc0 the positive output variations of the collector voltage.
Vin < 0. During the negative half wave, the input voltage is subtracted from the voltage of the input coupling capacitor Ce and the total voltage VCe - Vin is less than the quiescent emitter voltage Ve0 - Fig. 4. Now, an input current Iin begins flowing through the capacitor in a direction +Vcc -> Rc -> Tce -> Ce -> Vin -> -Vcc. The capacitor is slightly additionally charged and its voltage remains almost unchanged; so it "shifts up" the negative input voltage variations.
Фиг. 4. CB stage at negative input voltage.
As above, the collector voltage changes in the same direction. But now it is less than the voltage VCc across the output capacitor and something interesting happens - the charged capacitor Cc begins acting as a source that supplies the load. The load current IL begins flowing through the load in a direction +Cc -> Tce -> Re -> RL -> -Cc. The capacitance Cc is large enough; so the voltage Vc0 across it does not change noticeably... and the positive collector variations appear at the load as negative variations (the charged capacitor Cc "shifts down" with Vc0 the positive output variations of the collector voltage so the voltage across the load is negative).
Generalization. As can be seen from the pictures above, the coupling capacitors Ce and Cc play the role of "voltage shifting elements". Ce "shifts up" the input voltage variations while Cc "shifts down" the output voltage variations. Thus the transistor stage is properly biased - its emitter and collector voltages are positive, while the input and output voltages wiggle around the ground.
It is a well-known fact that people with practical and inventive thinking understand and explain circuits using knowledge not so much about the physical nature of active devices but mainly about their behavior in circuits. They manage to see basic ideas (concepts) extracted from their previous circuit experience and life. This generalizing thinking allows them to make connections between seemingly different circuit solutions... explain more and more circuits... and even invent new circuits. Here are the concepts I used to explain the CB stage:
Voltage division: R1 and R2 form an ordinary 2-component voltage divider that "produces'' a constant base voltage Vb. Re, Rce and Rc form a 3-component varying voltage divider producing the quiescent DC voltages Ve and Vc. Rce and Rc form an AC voltage divider that produces the AC output voltage Vc (Re is shunted by Vin through Ce).
Voltage "shifting": The coupling capacitor Ce and Cc "shifts up" the input voltage Vin; the output capacitor Cc "shifts down" the collector voltage variations.
Voltage fixing: The decoupling capacitor Cb fixes the R1-R2 divider's output voltage Vb.
Voltage following: Re introduces a current-type negative feedback ("emitter degeneration") that keeps up the DC emitter voltage and collector current constant thus stabilizing the quiescent point.