So I have this circuit; it should be a Darlington transistor circuit and I need to find the bias point for it.


simulate this circuit – Schematic created using CircuitLab https://imgur.com/Jf7SiJc

I got to the point where I calculated the Ic1 curent with Kirchoff in the V1 loop which is 1mA (which is a good value) but from there I got stuck.

First I thought as shown here:

enter image description here

Here the current doesn't go from the emitter of the second transistor but after I had studied more about this type of transistor here the calculations didn't seem to add up, or I am missing something. Any ideas ?

  • \$\begingroup\$ This design works poorly due to Q2-C too high and thus Q3 Vce near 0V \$\endgroup\$ – Tony Stewart EE75 Jan 6 at 16:44
  • \$\begingroup\$ If it should be a darlington circuit then why haven't you drawn it that way? \$\endgroup\$ – Andy aka Jan 6 at 16:52
  • \$\begingroup\$ Would you like to create a differential AC output with better DC bias as your question instead for this Darlingtonish design? \$\endgroup\$ – Tony Stewart EE75 Jan 6 at 16:55
  • \$\begingroup\$ The circuit in both pictures is the one given in the book(so can't realy modfy it in any way ) and I need the DC bias-point ( so Ic1 witch I found is 1mA Ic2 Ic3 UCE1 UCE2 and UCE3) done by hand , on paper ... My problem is how the darlington tranzistor ( Q1+Q2) affects the circuit \$\endgroup\$ – VlAd TbK Jan 6 at 17:01
  • \$\begingroup\$ I've updated the post with a photo of the initial circuit design ( before pasivization) \$\endgroup\$ – VlAd TbK Jan 6 at 17:09

You have shown a partial schematic with OPEN LOOP and feedback parts missing which makes the question invalid.

enter image description here

  • \$\begingroup\$ That's wrong becouse I've said the circuit that I need to be done is in DC so I posted the circuit after pasivizaiton and scurcircuit of the condesator as can be seen in the imgur photo \$\endgroup\$ – VlAd TbK Jan 6 at 18:04
  • \$\begingroup\$ + I posted an image with the full circuit in the question but is not what we need \$\endgroup\$ – VlAd TbK Jan 6 at 18:17
  • \$\begingroup\$ Achtung. You have NOT specified what you need for gain, offset and tolerances !! try this with negative feedback and high gain tinyurl.com/y2n2hqcz \$\endgroup\$ – Tony Stewart EE75 Jan 6 at 18:56
  • \$\begingroup\$ Your "Goal" should be for DC Q points to split Rc, Vce and Ve 3 ways = 15V/3 if you want a differential output \$\endgroup\$ – Tony Stewart EE75 Jan 6 at 18:59
  • \$\begingroup\$ Well I am sorry to say but is not that I didn't mention them becouse I didn't want , is becouse I don't have them . All of the data I have I gave in the post . Well , whatever thank you for the model I think I will go with @jonk and say the circuit is not built corectly \$\endgroup\$ – VlAd TbK Jan 6 at 19:05

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