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So I understand that if S3 is opened, then IC2A will receive in 1 VCC(high logic level) But if I close it will it be low level from ground (0) ? And if yes why? Why does VCC doesn't 'matter' anymore?

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    \$\begingroup\$ When the switch is closed, solve the circuit using Ohm's Law. You will see that a current flows, and you will also see where the voltage drop is (it's across the resistor, since the switch is effectively a short circuit). \$\endgroup\$ – nanofarad Jan 6 at 21:27
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The first thing you need to understand is that for all intents and purposes zero current flows into an input of a logic gate. The second thing you need to understand is that when no current flows through a resistor, no voltage drops across that resistor. The third thing you need to understand is that the voltage at the input to a gate determines whether it is determined to be a logic 0 or a logic 1.

When S3 is open no current flows from VCC to the node IC2A.1 because there would be nowhere for that current to flow. So no voltage drops across R4 in that condition, and IC2A.1 experiences VCC or logic 1.

When S3 is closed, current flows from VCC into the node IC2A.1 which is, by the way, exactly equal to GND (by definition) in this condition. S3 literally connects IC2A.1 to GND when it's closed. In this condition IC2A.1 experiences GND or logic 0.

A NAND gate outputs a logic 0 if and only if both inputs are logic 1, and outputs a logic 1 otherwise, again by definition.

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So I understand that if S3 is opened, then IC2A will receive in 1 VCC(high logic level).

Correct, but it's a "weak" high. It works because the input to the logic gate draws very little current so the voltage drop across the resistor is low enough not to matter.

But if I close it will it be low level from ground (0)?

Correct.

And if yes why? Why does VCC doesn't 'matter' anymore?

There are a number of ways to think about this. Perhaps the easiest is to think of the switch, when closed, being like a resistor with a resistance of, say, 1 Ω. Now you have a potential divider with the 10 kΩ resistor on top and the 1 Ω resistor on the bottom? Which will win the tug of war on the gate? The 1 Ω, of course. The voltage on the gate will be given by $$ V_g = \frac {R_S}{R_4 + R_S}V_{CC}= = \frac 1 {10k + 1}V_{CC} = \frac {V_{CC}} {10001} $$ and that's very close to zero.

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