I am new to the ngspice simulation and when I run a circuit into ngspice, it drops all the voltage across a mosfet but this is not the case when I simulated the same circuit into LTspice.

Any help would be really appreciated!

The circuit used for simulation in LTspice and ngspice engine:

Circuit used for simulation in LTspice and ngspice

Output at node 3 in LTspice: Output at node 3 in LTSPICE

SPICE used for ngspice simulation:

MOSFET in ngspice

V1 1 0 100V
M1 1 2 3 0 nmod W=1 L=0.5
.model nmod NMOS level=49 Version=3.1
V6 2 3 DC 0V PULSE(0 10 2NS 2NS 2NS 50NS 100NS)
R1 3 0 100
.options TEMP = 25C
.options TNOM = 25C
.tran 0.1u 1u 0 0
plot v(3)

Ngspice output at node 3:

ngspice output at node 3

  • \$\begingroup\$ @Aaron you mean into spice I see it connected to R1, format for FET is M1 <drain> <gate> <source> <substrate> where the substrate is connected with ground and source is connected with node 3 and node 3 is connected with R1 and ground. \$\endgroup\$
    – cod
    Jan 7, 2021 at 0:10
  • \$\begingroup\$ In LTSpice you can export the netlist from the Tools menu. Do that and compare to your netlist. \$\endgroup\$
    – Aaron
    Jan 7, 2021 at 0:14
  • \$\begingroup\$ I don't think the substrate should be connected to ground...I could be wrong though. \$\endgroup\$
    – Aaron
    Jan 7, 2021 at 0:17
  • \$\begingroup\$ Netlist from ltspice looks the same, C:\Users\Suba\Documents\LTspiceXVII\Draft1.asc R1 3 0 100 M1 1 2 3 3 BSC014N03MS V1 1 0 100 V2 2 3 PULSE(0 5 0 0 0 10u 20u 0) .model NMOS NMOS .model PMOS PMOS .lib C:\Users\Suba\Documents\LTspiceXVII\lib\cmp\standard.mos .tran 0 100u 0 0.1 .backanno .end \$\endgroup\$
    – cod
    Jan 7, 2021 at 0:29
  • \$\begingroup\$ @aaron I think we also could short-circuit substrate with the source too, but that could not help here either way. \$\endgroup\$
    – cod
    Jan 7, 2021 at 0:31

1 Answer 1


Your circuits used between the two programs are far from equivalent. For starters, you're using totally different MOSFETs in each netlist. In LTspice, you're using a VDMOS model for the Infineon BSC030N03MS. The parameters are defined in Documents\LTspiceXVII\lib\cmp\standard.mos. I copied and pasted the relevant line below:

.model BSC030N03MS VDMOS(Rg=1.5 Vto=2.52 Rd=1.65m Rs=254u Rb=834u Kp=388.3 Lambda=0.07 Cgdmin=73p Cgdmax=1.02n A=0.6 Cgs=4.17n Cjo=3.23n M=0.3 Is=25.4p VJ=0.9 N=1.11 TT=3n ksubthres=.1 mfg=Infineon Vds=30 Ron=3.8m Qg=27n)

A couple things to unpack here. First, if you look at the model parameters the threshold voltage is the Vto and has a value of 2.52V, which you should be aware of. Next, is the issue already addressed in the question's comments. VDMOS models are for discrete power transistors, which are constructed in a way where the source and body are always tied together. The nmos 3-terminal symbol you used in LTspice always copies the source node to the body node. For integrated circuit MOSFETs, which we'll discuss below, you typically want to use the nmos4 4-terminal symbol so you can independently connect the body/bulk connection.

In your ngspice netlist, you are using a Level=49 Version=3.1 MOSFET which is a BSIM3 v3.1 model. Lots of problems here. First is that these are models for integrated circuit MOSFETs, and not discrete ones. Second is that v3.1 of BSIM3 is outdated and not recommended for use according to the ngspice manual (section 11.2.10). They recommend only using v3.3.0. Third, you set the width to 1meter and length to half a meter. That's a rather large MOSFET...probably takes up more space than my desk, which means it won't operate properly. Last, you didn't specify any parameters for this MOSFET, which means it uses all default values. You need to check out the BSIM3 manual link found within the ngspice manual to see all the defaults listed, beginning in Appendix A.2. For example, the default threshold voltage is 0.7V for a BSIM3 v3.3.0 NMOS.

The last thing to address is your pulse source, which is also different between the two circuit netlists. You didn't do us any favors by hiding your PULSE definition for V2 in the LTspice schematic, but I was able to roughly figure it out. You are on two totally different time scales. The LTspice one roughly has a period 20µs while the ngspice one has a period of 100ns. This is a big difference since MOSFETs have switching characteristics depending on how fast you can charge/discharge the gate.

For your specific scenario, I recommend you make sure to use the same exact PULSE voltage source and also copy that .model BSC030N03MS VDMOS line referenced above into your ngspice netlist since ngspice also supports VDMOS models. You shouldn't be using a BSIM3 for this kind of experiment, especially that gigantic one with all default values.

You can actually run your ngspice netlist text files within LTspice. Just open them up and hit Simulate -> Run. The only thing you need to do is remove the .control / .endc section or add a * at the beginning of each of the lines for that section since LTspice doesn't recognize them. I do this a lot when comparing outputs between both programs.


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