So i understand that a prescaler divides a clock, and PR2 is the period register which when the timer TMR2 reaches the value it increments from 0.
Why is a post scaler needed to divide a non-clock signal.
From the diagram it looks like the post scaler is trying to divide the comparator signal for when the first timer TMR2 reaches PR2 value.
I dont understand, couldnt another timer be used to identify when TMR2 reaches N iterations of reset?
Essentially i dont know what a post scaler performs and why it is used to divide a non-clock signal