1
\$\begingroup\$

I need to know how to generate N pulse with STM32f107 without any external sampling. Could you provide me any good reference?

Thanks

\$\endgroup\$
4
  • 1
    \$\begingroup\$ what is an N pulse? \$\endgroup\$ Commented Jan 8, 2021 at 13:46
  • \$\begingroup\$ For example , generating N pulses with specific frequency( A PWM signal but with specific number of pulses) \$\endgroup\$
    – John Jin
    Commented Jan 8, 2021 at 13:55
  • \$\begingroup\$ Ok, this is far too broad. This is really the same as "letting an LED blink", and you should definitely read a tutorial by ST if this is not clear to you. \$\endgroup\$ Commented Jan 8, 2021 at 14:03
  • \$\begingroup\$ Yes, I need to have a good reference or someone who did it in the past. \$\endgroup\$
    – John Jin
    Commented Jan 8, 2021 at 14:21

1 Answer 1

3
\$\begingroup\$

I can think of 3 possible ways to generate N pulses.

  1. The first method is obvious: Generate a PWM with 50% duty cycle using a TIM module. Count overflows with update event interrupt. In the interrupt, stop TIM when you reach N overflows. This method has some interrupt overhead and may not be suitable if the required frequency is high.

  2. The second method is a little bit strange: You can abuse an SPI module. In this case your frequency and N options are limited: You can only choose one of the possible SPI clock options and N must be divisible by 8 (Not STM32F107 but some other devices may provide more flexible options for N). Using DMA, send N / 8 bytes, and the SPI clock pin will generate your N pulses. This methods doesn't need interrupts, but you may set a DMA transfer complete interrupt to be notified when the transmission of the N pulses is completed.

  3. This one is the modified version of the first method. Instead of counting pulses in the interrupt service routine (ISR), you can configure another TIM module to be the slave of the first one. The master TIM generates the pulses as usual, but each update event causes slave timer to increase its counter value. You can configure the slave timer to generate interrupt when the required pulse count is reached. Compared to the first method, this method has no periodic interrupt overhead, but it costs you an additional TIM module. Also in very high frequencies and in the presence of other high priority interrupts, you may get additional pulses as the ISR may need some time to find a chance to run and disable the master timer.

\$\endgroup\$
2
  • \$\begingroup\$ Thank you very much \$\endgroup\$
    – John Jin
    Commented Jan 11, 2021 at 3:39
  • \$\begingroup\$ Dear Tagli, could you provide me more information about the first, third approach? can you provide me an example or introduce me a good reference? \$\endgroup\$
    – John Jin
    Commented Jan 17, 2021 at 19:00

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.