This is probably a very stupid question. I am new to electrical engineering in general, I was working with NOT transistor gates in order to make a simple SR Latch and came across this case. D2 and D1 in my circuit are both pulled to ground even though when simulated D2 should still be fine the only reason I decided to ask about this is because I couldn't find anything on the internet about it (maybe I was using the wrong terms?). If someone could take a moment of their time to tell me why this doesn't work that would be amazing. The desired result is to have D2 be ON while D1 is pulled to ground and OFF.
It seems I lack understanding in the topic and I'm trying to get a better grasp on it.