For 1.5GHz with a 1/4Wave ~ 3cm and the SMT radius about 10% of this , it is unlikely to make a difference at this frequency so filling it will reduce ingress at shorter wavelengths, yet one wants to avoid solder bridges under the holes. In the end, it doesn't make a huge difference for GSM but would for higher frequencies. Only test validation will know for sure.
Background info
Track impedance \$Z_O=\sqrt{\dfrac{L}{C}}\$ and this depends on conductor/dielectric ratios for L/G and L/H or L/H/G ratios.
Coplanar gaps have less effect on C than dielectric gaps between trace and ground plane underneath.
I see no reason for Figure 1 as that raises the impedance up to 50% with a large increase in W/G. Although I do see a reason for preventing a solder bridge.
Guarded trace W/G=5/1 Coplanar Gap = 20% of Width
This is only for FR4.
Under SMT W/G = 0.20 or a 1-side only change in gap, this amounts to an increase of 4/0.2 or 20:1 with a possible rise of 50% in impedance.

I might consider a compromise but the Height of dielectric and effective Dk of PCB are unknown and may be different in each example you saw. Yet it's the ratios that matter in discontinuities for relative changes.

These differences will be manifested by S parameters on the harmonics of the signals or interference well above GSM band.