wide swing cascode cascode bias voltage generation

On the left is a low voltage cascode current mirror and on the right is a circuit whose left branch generates \$V_b\$ for the mirror. Razavi (Design of Analog CMOS Integrated Circuits 2nd edition, page 144) says we want \$V_b\$ = \$(V_{gs,1}-V_{th})+V_{gs,0}\$, so we want a bias circuit which generates a gate-source voltage and an overdrive, which makes sense. The goal is for \$V_b\$ to force M1 to be near the edge of saturation for the most headroom.

Razavi says the biasing circuit on the right does this since "the diode-connected transistor M7 provides the necessary \$V_{GS}\$ and M6 creates a \$V_{DS}\$ equal to the required overdrive." I'm not sure why this is.

I see that by definition \$V_b\$ = \$V_{gs,7}+V_{ds,6}\$. Since M7 is diode-connected, it generates a gate-source voltage.

(Edit): I realized I made a mistake since M6 is actually in triode and not saturation, so the drop across it needs to be matched to the overdrive of M1. How is this done?

  • \$\begingroup\$ Here ya go tinyurl.com/y3pu2mf3 \$\endgroup\$ – Tony Stewart EE75 Jan 13 at 22:32
  • 1
    \$\begingroup\$ @TonyStewartSunnyskyguyEE75 Thanks for the link \$\endgroup\$ – knzy Jan 14 at 4:27

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