Why does pin 4 (Q7) 4040 reset itself perfectly but not reset 4026? I would like the signal from this pin to reset the 4026 as well, but it doesn't. I also do not understand why this pin has such a low voltage of 0.5V? Why is the 4040 still resetting with this voltage? I just want pin 4 of 4040 to reset all of my counters. (For now, 4026 the reset pins are grounded)
Having the 4040 reset itself from a Q output is a sketchy solution. There is a race condition because as soon as Q goes high it resets itself so the reset pulse is very narrow and may violate the minimum pulse width requirement of the reset pulse so perhaps not all internal flip flops in the counter will have time to reset.
Another approach is to not reset the 4040 at all, letting it just continue to count and wrap around. In this scheme we only need to reset the 4026 counter any time the 4040’s Q7 changes state. This circuit uses a quad NOR to generate a positive pulse on either edge of Q7 and OR them together. Make the R-C large enough to get a clean pulse of 1uS or more at the output.The diodes are conservative protection against negative spikes and can be implemented in one 3-pin part (BAT54A).