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Why does pin 4 (Q7) 4040 reset itself perfectly but not reset 4026? I would like the signal from this pin to reset the 4026 as well, but it doesn't. I also do not understand why this pin has such a low voltage of 0.5V? Why is the 4040 still resetting with this voltage? I just want pin 4 of 4040 to reset all of my counters. (For now, 4026 the reset pins are grounded)enter image description here

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  • \$\begingroup\$ Your questions are a bit "duh" I mean, the answer is a bit too obvious. Why does pin 4 (Q7) 4040 reset itself perfectly but not reset 4026? Because the reset inputs of the 4026 are connected to ground (0). I would like the signal from this pin to reset the 4026 as well Then connect the reset inputs of the 4026 to Q7 of the 4040. why this pin has such a low voltage of 0.5V? Be more specific, which pin? How are you measuring that? Is the circuit doing anything (counters counting etc.). Are you measuring with a multimeter or oscilloscope? Is this your design or not? \$\endgroup\$ – Bimpelrekkie Jan 14 at 20:38
  • \$\begingroup\$ @Bimpelrekkie Thank you for the answer. This is my project. The Q7 output pin is not connected to pin 15 of 4026 because it is not working - I understand missing this connection confusing you, sorry. Of course, I know they need to be connected together. I measure it with an oscilloscope. The circuit is a sequencer that reads voltage values from a potentiometer and writes it to the static memeory. \$\endgroup\$ – Jerzy Przezdziecki Jan 14 at 20:51
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Having the 4040 reset itself from a Q output is a sketchy solution. There is a race condition because as soon as Q goes high it resets itself so the reset pulse is very narrow and may violate the minimum pulse width requirement of the reset pulse so perhaps not all internal flip flops in the counter will have time to reset.

Another approach is to not reset the 4040 at all, letting it just continue to count and wrap around. In this scheme we only need to reset the 4026 counter any time the 4040’s Q7 changes state. This circuit uses a quad NOR to generate a positive pulse on either edge of Q7 and OR them together. Make the R-C large enough to get a clean pulse of 1uS or more at the output.The diodes are conservative protection against negative spikes and can be implemented in one 3-pin part (BAT54A).

enter image description here

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  • \$\begingroup\$ Thanks for this solution. \$\endgroup\$ – Jerzy Przezdziecki Jan 16 at 9:10
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The short loop delay pulse duration is insufficient for your 4xxx series CMOS which is much slower than 4040 . Even though 74HCxx logic family is much faster, you still need to stretch the pulse by adding feedback delay.

enter image description here

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  • \$\begingroup\$ Stewart Thank you for your answer. Unfortunately, this solution does not work. The problem is that any other output (Q) 4040 if not connected to the reset input itself - I can use as a signal to reset another chip - in this case, 4026. However, if output Q is shorted to reset pin 4040 - then I cannot take the signal and reset 4026. \$\endgroup\$ – Jerzy Przezdziecki Jan 14 at 21:08
  • \$\begingroup\$ What I showed WILL WORK. it is not shorted rather stretched to 1us \$\endgroup\$ – Tony Stewart EE75 Jan 15 at 0:31
  • \$\begingroup\$ @TonnyStewartSunnyskyguy I'm not questioning this, sorry if that looked like. I just don't ANY pulse on my scope. The voltage is 0.5V at pin Q7 when connected with RC network to the RESET pin of 4040. This I cannot explain, why? Maybe my scope does not see the nano second spike? \$\endgroup\$ – Jerzy Przezdziecki Jan 15 at 10:17
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    \$\begingroup\$ The RC circuit should delay the reset pulse and stretch it near 1us. If done as shown. \$\endgroup\$ – Tony Stewart EE75 Jan 15 at 13:05

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