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I have a MCU (STM32H7xx) whose GPIOs, when configured as output, can be configured either as open-drain or push-pull. Before seeing this, I though that open-drain meant hihg-Z, however I don't see how that works just reading the STMicro documents. Let me explain:

This is the GPIO schematics: GPIO schematics

And this is the explanation I'm reading (attached as image to not lose the formatting): enter image description here

Now, with regards to the push-pull output mode, my understanding is that the pull up/down resistors are disabled, the mosfets are used to output VDD or VSS (which is ground). I'm happy with that.

What I don't understand is what is the goal of open-drain mode, let me explain: the doc. says that you need to enable the pull-up resistor to work in this mode. In that case, I understand that when you enable the NMOS, VDD is grounded through the pull-up resistor, therefore the output pin is driving a 0. However, if the NMOS is disabled, it will be driving VDD through the pull-up resistor.

Questions: Is the above correct? If so, what is the point of this mode? It seems to achieve exactly the same behaviour as the push-pull one. How do you get a high-Z output?

Sources:

stm32h7 43/53 reference manual - see 11.3.10

STM32 GPIO configuration - see 3.3.2

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    \$\begingroup\$ One advantage is that you can wire-OR several open drain outputs together, and if any one pulls low the signal will go low. This could be useful for a bunch of fault signals for example. Any fault would pull the shutdown or error indication signal low. \$\endgroup\$
    – John D
    Jan 16 '21 at 19:46
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    \$\begingroup\$ Open collector can be used to level converter, driving transistor, creating current loop etc. \$\endgroup\$
    – user263983
    Jan 16 '21 at 19:48
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First misconception : Push-pull mode does not mean the weak pull-up and pull-down resistors are disabled. On some MCUs they can be, but this MCU has separate control for resistors and output mode. The resistors can be enabled even in push-pull mode, but it just makes no sense because the strong transistors can push or pull much stronger and will override the weak resistors.

The push-pull mode means the output is either strongly pulled low to VSS, or strongly pulled high to VDD.

The open drain mode simply stops driving the high FET, so either the pin is strongly pulled low to VSS, or left floating high-Z. Depending on internal pull-up resistors or external ones, that is then responsible to pull the data high. If you want high-Z, use open-drain mode so it won't push high, or set the pin as input and it won't push high or pull low.

Open drain mode is compatible with other items that are open-drain. In the case of I2C bus for example, the IO pin must be in open-drain mode, and what is even more handy is the fact that while it is a 3.3V MCU, the open-drain mode allows (some pins, not all) to be pulled up to 5V, to for example allow the 3.3V MCU to talk directly on a 5V I2C bus with other 5V I2C devices.

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The open-collector mode is commonly used to drive a signal that is shared by multiple drivers (such as your microcontroller and a temperature sensor). When neither device is driving the signal will be high because of the pullup resistor, but the NMOS transistors in both devices are capable of over driving the resistor and pulling the line low.

So, either device can pull the line low. Either device can allow the line to go high by not pulling it low. The last piece of the puzzle is a communications protocol that prevents collisions...both devices trying to drive the line low at the same time.

A good example of this is I2C communications, which uses a single wire as a bidirectional shared data line between many devices. One of the devices must be the master, which controls the communication and allows the other devices to use the line.

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Yes that’s correct.

If you used open drain then you need a resistor to turn off the drain which is slower since it would be higher resistance than a 25~50 R CMOS driver when going for high speed low V with Ciss rising with reduction of RdsOn.

Use the Push pull driver mode if they use the same voltage with Vt=~1V FETs.

Use the Open Drain with a pull-up R=470 to 1K R or so to use higher voltage FETs. This then acts as a voltage level translator. Be sure to allow a 1us deadband or so to prevent cross-conduction. This is sometimes done with unequal resistors to the gates and a diode so that the turn on time is slower with a higher resistance and then the turn off time is faster with the diode and a smaller resistor.

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