SDRAM supports more addresses than their address bus width allows thanks to the bank/row/column scheme it's based on.

My question is if there are non volatile parallel memories that are based on the same bank/row/column scheme so they can support further addresses than the address bus lines allow. After a quick search in various stores I guess that the answer is NO. If not, why?

  • \$\begingroup\$ Are you asking about the internal structure of the device or the interface between it and the CPU? \$\endgroup\$
    – Finbarr
    Jan 20, 2021 at 13:38
  • \$\begingroup\$ @Finbarr Interface between the memory and CPU actually \$\endgroup\$
    – BamsBamx
    Jan 20, 2021 at 15:36

2 Answers 2


No, NOR Flash with an interface that matches SDRAM interface of bank/row/column addressing does not exist, because NOR Flash is not accessed as rows and columns (and banks) like DRAM natively is.

However, many kinds of NOR Flash chips do exist with a multiplexing scheme to reduce pin count.

Some have multiplexed address/data bus to save pins. This is sometimes called ADM muxed memory.

Some have multiplexed address bus to save pins. This is sometimes called AADM muxed memory.

How that relates to the internal structure of the NOR Flash itself is another thing, it's just that the interface is multiplexed.


Yes there are; basically, most mass storage media that I can think of do that.

Most flash has a complex addressing scheme that's based on pages, banks, rows, and column drivers. There's flash with parallel address interfaces; how that is encapsulated in a serial transport (e.g. USB mass storage device, or NVMe) is a different topic, but the "block" structure applies to all of these.

Hard drives (used to have all of) disks, sides/tracks, sectors and bytes; good ole IDE / ATA PIO had a linear block addressing scheme that fits a "these are banks of banks" relatively well.


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