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I would like to build circuit that can detect current flow and provide suitable digital high signal to GPIO pin for 3.3V ESP-01 logic.

I started looking at the designs available on internet. Option that drawn my attention is based on current transformer / Hall's effect combined with OP amp (or comparator). Current from the main line is represented with the proportional voltage drop which is used as input for an OP amp. As I understand OP amp (with negative feedback) suppose to give amplified signal representation prepared for further processing or in case of comparator (positive feedback) digital representation could be provided. But neither of those options can serve exactly my needs. When OP amp is used as amplifier (negative feedback) I get amplified voltage representation for current flow. Second option, using converter (positive feedback) gives saturated voltages, and thus it can give digital representation, but in that case, depending on the way comparator is configured you can get digital high during first half of sinusoidal signal and 0 during second half or vice versa. In booth cases it is not what I need.

In short, I don't know how to use circuitry to process signal after OP amp/comparator and get suitable 3.3V logic HIGH state on GPIO when current flow is present.

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  • \$\begingroup\$ But neither of those options can serve exactly my needs - you need to fully state what these needs are. Then someone will pick apart those needs in order to generate a valid and applicable set of needs that can be used to describe the problem you are facing. Only then may recommendations be offered. \$\endgroup\$
    – Andy aka
    Jan 21 at 11:47
  • \$\begingroup\$ "As small as possible" is also ambiguous - can you use 0201 SMT parts? Chip-scale? Contract a manufacturer to make custom ASIC? Size can be microscopic, but at what cost? \$\endgroup\$
    – rdtsc
    Jan 21 at 13:02
  • \$\begingroup\$ @Andy aka I thought I stated requirement. Goal is to represent AC current flow as 3.3V logic level HIGH input for ESP-01 GPIO. By this "But neither of those options can serve exactly my needs" I meant to say that when OP amp is used as amplifier (negative feedback) I get amplified voltage representation for current flow. Second option, using converter (positive feedback) gives saturated voltages, digital representation, but for example you get digital high during first half of sinusoidal signal and 0 during second half. In booth cases it is not what I need, 3.3V dig high when current flows. \$\endgroup\$
    – moci
    Jan 21 at 16:47
  • \$\begingroup\$ @rdtsc My problem is not related with the size of the parts. I will withdraw my comment on the size as I can see it just draws attention in a wrong direction. My main problem is to find suitable circuit that can represent AC current flow as 3.3V dig logic high for GPIO pin on ESP-01 \$\endgroup\$
    – moci
    Jan 21 at 16:51
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How to use circuitry to process signal after OP amp/comparator and get suitable 3.3V logic HIGH state on GPIO when current flow is present

AC current oscillates about zero, so crosses zero twice per cycle. Any circuitry used to detect this current is going to output a time-varying result, usually two pulses per cycle. Even if the AC current signal is rectified to a DC current signal, it'll still produce two pulses per cycle. And maybe that is ok and handled in software:

  • Detect high once, set a "pulse detected" timer for 0.2s. Set LOAD = 1.
  • Try detecting multiple times - eventually detect another one, reset timer.
  • When no pulses detected in 0.2s, assume must be off, clear timer. Set LOAD = 0.

This is not ideal, as it is possible to "always sample at the wrong time" and miss events. An alternative to this, is if the micro has "interrupt on pin-change" capability. If it does, reset the timer like previous on each interrupt. Here the timer only needs to be 21ms, because each pulse will always be detected.

If that's no good (need a physically constant logic high) then use that pulsed signal to charge a capacitor, through a diode, long enough so that it can't go low while pulses are present. For 50Hz mains AC the period is 20ms, 60Hz = 18.667ms (remember two pulses in this much time.) Might want/need to buffer the cap output to the GPIO, perhaps with a Schottky buffer to get a "clean" digital signal. Of course this means the GPIO detection of turn-off will be slightly delayed by the time-constant of the capacitor used. Research R-C Time Constant for more info.

schematic

simulate this circuit – Schematic created using CircuitLab

Might look something like this (note this can be simulated here and values adjusted.)

Then there's the issue of resolution. If you want simple "flow", "no flow" resolution, then what threshold should be considered "on"? 1A? 1mA? The setpoint can be adjusted by altering the opamp resistor values, but the result will get noisier at lower currents. Also consider that this setpoint may drift with temperature.

If considering linear 0-3.3v = 0-15A, that becomes much more complex since the AC current is almost never a pure sinusoid. The only practical way of measuring an analog AC current is via the Root-Mean-Square (RMS) method.

Take a look at the various types of current sensors offered by all manufacturers and distributors. It may be possible to find a robust and easy-to-use solution which would work well for your application.

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Define max voltage drop and current then use a low side Rs with a high gain noninverting Op Amp to desired level using PNPInput type OA that senses to 0V.

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