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In Xilinx ISE, most of the time, when I want to rename the net of a certain port, I have no problem. I right-click on the I/O marker, click Rename Port, and I get the window for Rename Net. However, for some reason, when I do the same for some I/O markers, I get the window for Rename Bus. How can I get the window for Rename Net?

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  • \$\begingroup\$ @MituRaj Might be using an older FPGA. Vivado might look better than ISE but it also seems to run a low slower. \$\endgroup\$
    – DKNguyen
    Commented Jan 26, 2021 at 5:47
  • \$\begingroup\$ @MituRaj I am using this for a school assignment. I do not have any choice in the tools I use. \$\endgroup\$
    – Stuck
    Commented Jan 26, 2021 at 8:14

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