Other answers have pointed out what you're doing wrong with precedence. But you do still have problems with using floating-point if your micro doesn't have floating-point support. The compiler will sort it out, but it'll be very slow.
For dividing by a constant value where you're scaling one fixed range to another fixed range, you can get a reasonable approximation by using selective bit-shifting. Right-shifting divides the value by powers of 2, and you can use this to get something close to the division you need. This will not be perfectly linear, but it will be much faster than using software floating-point, and if you have noise on your analogue signal and ADC measurement then the linearity of this scaling may not be an issue.
For your example, you can scale 0 to 65535 down to 0 to 4999 with the following:
uint16_t temperature = (reading >> 4) + (reading >> 6) + (reading >> 13) + (reading >> 15) - (reading >> 9);
With regular divides, this would be
uint16_t temperature = (reading / 16) + (reading / 64) + (reading / 8192) + (reading / 32768) - (reading / 512);
but of course you don't want to use actual divides! Compilers sometimes aren't smart enough to work out that dividing by a power-of-2 constant can be done with a bitshift, and if you rely on it with compilers that are smart enough, you can get tripped up when you change micros/compilers.
Checking this with Excel over the 0 to 65535 range, it is linear to 3 lsbs over the full range.
The general method is to start with a right-shift for the maximum input value (65535) which puts you in the right ballpark for the desired output (4999), and then progressively add (or subtract) more shifted terms until you get to the right total. Because you are correcting the difference using the upper bits of the value, it remains relatively linear.
This is basically a riff on the Taylor series. Surprisingly though, I've never seen it published anywhere before I came up with the idea. I first used it for the 10-bit ADCs which were/are common on PIC and Atmel microcontrollers, to normalise an ADC measurement of 0 to 1023 into a convenient hundredths-of-volts scaling of 0 to 1000 with less than 0.5 bit linearity error over the range. It was published in Everyday Practical Electronics in the early 2000s (and won me an LCR meter as the best submission for that edition! :) I would link to the article, but EPE's archives are a bit spotty and I can't easily find it now.