The Microchip (ex-Atmel) ATSAMD10 has a 12-bit SAR ADC with the option to use differential input. I'm generating a virtual ground (\$V_\mathrm{mid}\$) at the midpoint (512 mV) of the reference voltage (1.024 V), with the input signal centered around that.

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My question is regarding the reference plane for the analog section preceding the ADC. There is a simple 2nd order low-pass Sallen-Key for anti-aliasing, and a placeholder for another RC filter after the Sallen-Key. Should the plane beneath the analog section be ground, or \$V_\mathrm{mid}\$? My feeling is that it should be \$V_\mathrm{mid}\$ as the filters are all connected to that reference voltage. The only ground connections in that region are for the opamp power.

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This is for a two layer board, currently with a ground pour on the bottom layer (green) with some \$V_\mathrm{mid}\$ traces through for routing. All the analog inputs are on the bottom of the microcontroller at the top left.

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The system is not particularly demanding, but (notional, given the ADC's performance) LSB performance would be nice.

  • Source impedance: 18 \$\Omega\$
  • \$V_\mathrm{LSB}\$: 250 \$\mu V\$
  • \$f_c\$: 1.25 kHz
  • \$f_s\$: 4.096 kHz

1 Answer 1


It (almost) doesn't matter what voltage the plane is at, as it will only be capacitatively coupled.

The important thing is to use the lowest impedance domain so it can rapidly absorb/source charge. This is usually your "ground".

12 bits, at your voltage and frequency...use ground and you should be good to go.

  • 1
    \$\begingroup\$ My analog days were dual supply, so I was uncertain about this - makes sense, it's just dumping things to any fixed low impedance. I'll wait a bit before accepting in case there are other thoughts, but otherwise all good :) \$\endgroup\$
    – awjlogan
    Commented Jan 26, 2021 at 15:17
  • \$\begingroup\$ @awjlogan I think gnd too. Your mid-bias is going to have a decoupling caps anyways, right? From your divider output (or opamp output buffering the divider)? \$\endgroup\$
    – DKNguyen
    Commented Jan 26, 2021 at 15:33
  • \$\begingroup\$ @DKNguyen Yes - thanks, that's a good point, there's no decoupling on the output from the voltage reference at the moment. I don't want to put a capacitor on the output of the buffer opamp, as it'll need a series resistor for stability and I don't want to up its impedance. So 0 V ground is the current front runner. \$\endgroup\$
    – awjlogan
    Commented Jan 26, 2021 at 15:41
  • \$\begingroup\$ @awjlogan I meant to say "decoupling cap from divider/buffer output to each rail" \$\endgroup\$
    – DKNguyen
    Commented Jan 26, 2021 at 15:43
  • 2
    \$\begingroup\$ @awjlogan I don't think necessarily wrong. I put those on dividers generating a mid supply but maybe not needed with opamps due to the low output impedance. Yeah, maybe not. \$\endgroup\$
    – DKNguyen
    Commented Jan 26, 2021 at 15:51

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