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I'm using an ICM7555 chip for a monostable/one-shot circuit.

https://www.renesas.com/sg/ja/document/dst/icm7555-icm7556-datasheet

In the figures, it shows a capacitor on pin 5 (control voltage). But it is listed as "optional". Does anyone know why this is optional? Does that mean we should include that cap as long as we're not applying a different (meaning, anything other than 2/3*VDD) voltage at that input?

enter image description here

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  • \$\begingroup\$ OooooOOoOoOOoooo you bought fancy 555s. \$\endgroup\$ – K H Jan 29 at 6:27
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The use of this capacitor is discussed on page 5 of the datasheet you linked. Whether or not you need this capacitor depends on your application and its requirements.

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Generally you should add it, 10nF is usually enough. The CMOS 555 has a high input impedance on the control voltage input, so EMI can affect the timing cycle even if the supply voltage is very stable.

The 555 timer circuits do not have internal references so the timing is affected both by noise on the divider chain and by any changes in the supply voltage during a given cycle. If the supply voltage is stable over a cycle then slower changes cancel out.

In practice, adding the capacitor may affect the timing slightly (in sloppy 555 terms, that is, slightly), perhaps by 5-20%.

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