Looking at following datasheet: https://www.onsemi.com/pub/Collateral/2N5457-D.PDF
I'm puzzled as to why there are multiple "typical characteristic " (pairs of) charts. As far as my understanding goes, FETs are voltage controlled devices so why do we have multiple (and contradictory) values of drain current for given drain-source voltage and gate voltage? (figures 2, 4 and 6).