I am designing a PCB with an RJ45, discrete magnetics and an ethernet phy that can support 10/100/1000 speeds. I am considering the implementation of ESD/TVS diodes. For this I gathered the following:
-> Working voltage Vrwm of diodes must be greater than the signal voltage. Voltage levels are +/- 2.5V.
-> Junction capacitance must be less than 2.5pF (according to TI) as we're dealing with high speed signals
I am, however, unsure about the following design requirements:
- What must the clamping voltage of the diodes be? Will this depend on the phy selected?
- I mostly see the diodes be placed on the secondary side of the magnetics, what is the reason for that? It makes sense to me to place the diodes as close to the RJ45 as possible, ensuring shortest possible path to GND during ESD strike.
- Since the ethernet diff pairs are truly differential and not referenced to GND, how must the diodes be arranged? What rails will the signals be clamped to if the diodes aren't GND referenced as in the image attached? Where will the ESD strike feed into?
- Some designs use integrated diode with 'steering diode' and TVS diodes. What is the purpose of having both?
Source: https://interferencetechnology.com/defending-ethernet-ports-from-electrical-transient-events/