I am designing a PCB with an RJ45, discrete magnetics and an ethernet phy that can support 10/100/1000 speeds. I am considering the implementation of ESD/TVS diodes. For this I gathered the following:

-> Working voltage Vrwm of diodes must be greater than the signal voltage. Voltage levels are +/- 2.5V.

-> Junction capacitance must be less than 2.5pF (according to TI) as we're dealing with high speed signals

I am, however, unsure about the following design requirements:

  1. What must the clamping voltage of the diodes be? Will this depend on the phy selected?
  2. I mostly see the diodes be placed on the secondary side of the magnetics, what is the reason for that? It makes sense to me to place the diodes as close to the RJ45 as possible, ensuring shortest possible path to GND during ESD strike.
  3. Since the ethernet diff pairs are truly differential and not referenced to GND, how must the diodes be arranged? What rails will the signals be clamped to if the diodes aren't GND referenced as in the image attached? Where will the ESD strike feed into?
  4. Some designs use integrated diode with 'steering diode' and TVS diodes. What is the purpose of having both?

ESD clamp diodes on Ethernet PHY side Source: https://interferencetechnology.com/defending-ethernet-ports-from-electrical-transient-events/

  • \$\begingroup\$ The magnetics have a common mode choke and and isolation transformer \$\endgroup\$
    – pcbguy
    Jan 30, 2021 at 0:13
  • \$\begingroup\$ thank you - why aren't the diodes tied to GND on the secondary side then? \$\endgroup\$
    – pcbguy
    Jan 30, 2021 at 0:30
  • \$\begingroup\$ Oh, I should have paid attention. Forget what I said - it made no sense. \$\endgroup\$
    – user253751
    Jan 30, 2021 at 0:31
  • \$\begingroup\$ No, you're right actually my point 2 didn't make sense. Like you said it's counter productive to have the diode on the primary side since we're isolating. But since we're placing them on the secondary side, why not clamp to GND? \$\endgroup\$
    – pcbguy
    Jan 30, 2021 at 0:37
  • \$\begingroup\$ I would have expected them to clamp to GND on the secondary side. But I have no experience with Ethernet electronics either. \$\endgroup\$
    – user253751
    Jan 30, 2021 at 0:39

2 Answers 2


Check the datasheet for Rclamp3374N. It has a common GND connection that is the dissipation point for the ESD strike (GND goes to the big diode in the middle, to the anode side.)

The Rclamp3374N clamping action limits the signals to between GND and the Zener breakdown voltage of about 3.5V. Ethernet signals are smaller than that (+/-2.5V differential) so normally the TVS doesn't conduct in the presence of Ethernet PHY signals alone.

Why use the ESD array then, and why on the PHY side? The magnetics do a good job of isolating spikes induced onto the field wiring, using both built-in common-mode filters and galvanic isolation between the wires and the PHY. But these magnetics are not perfect: some ESD energy can still shoot through the transformer due to mutual coupling and capacitance.

The ESD array catches this residual energy before it can make its way the PHY: it's a last line of defense. This will improve your ESD/EMC testing performance and make your product more robust in the field.

Could you use ESD protection on the field wiring side? Sure, it's possible. Generally though no assumption is made about the wires' common-mode voltage with respect to the system, which complicates designing a spike catcher for them. Further, the magnetics are deliberately designed to maximize the system-to-wire isolation as much as possible, with the exception of the 'Bob Smith' termination; a wire-side ESD array would partially defeat that.

Finally, note that the Rclamp3374N package is laid out in such a way that the PHY signals route through it to reduce impedance discontinuities. Make sure you take advantage of that when you lay out your board.

  1. Voltage levels swings at the PHY side are usually biased around the PHY analog supply voltage, which might be 3.3V, so it depends on the PHY selected. If there is a differential voltage of +2.5V, one pin would be 3.3+1.25=4.55V and the other 3.3-1.25=2.05V. It would be quite safe to say that an ESD protection device that has no effect on 5V signals is good enough for the job.

  2. That is because the transformer galvanically isolates the connector from PHY. At the PHY side of the transformer you have the signals and ground and supplies for the PHY chip, and you must protect the pins of the PHY chip in reference to ground and supplies. On the connector side of the transformer, you have no common reference for the differential signals, and you have no ground where to dump your ESD event. Due to the isolation, you can have 1000V between the two devices and it would still be perfectly acceptable.

  3. As per answer 2), do not put any protection that providrs a DC path that to local ground. Ethernet interfaces have a capacitor to handle the fast common mode transients. And if you do want to ESD protect the transformer connector side coils, simply place an ESD diode on each differential pair. Simply use a connector that has integrated magnetics, and you don't need to worry about it much. So basically, since you don't have a ground to reference, you can't ESD protect the connector side to any common potential, only between them. Lightning protection could be a GDT from data pins to earth, but that would conduct at much higher voltages than few hundred volts.

  4. In that case there is only a ground connection necessary to clamp both positive and negative spikes. Otherwise you need both ground and supply connections to clamp positive and negative spikes.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.