# Op-amp with voltages in both inputs

I'm trying to solve a practice problem, which is represented by the schematic below.

simulate this circuit – Schematic created using CircuitLab

We are asked to relate the voltages $$\V_1,V_2\$$ to the output voltage $$\V_o\$$. The value of R is considered to be known, and all transistor base voltages are considered zero. The input voltages aren't specified as DC or AC, but previous problems from the set considered them AC. The base-emitter bias voltages are considered to be $$\Vbe = 0.7 V\$$.

My steps to solve the problem:

• The left part of the circuit is a buffered current mirror. This means that the current across the leftmost resistor 2R is reflected across the rightmost resistor R.
• The current across the leftmost resistor is $$\I_c = \frac{V_1-1.4}{2R}\$$. This current is reflected to the rightmost one, R
• We can calculate the voltage drop across R to find the collector voltage of Q2.

$$\V_C2 = Vce_2 = Vcc - I_cR = Vcc - \frac{V_1-1.4}{2} \$$

If my calculations are correct, this is the input at the non-inverting terminal of the opamp. And this is the point where I can't determine the operation of the opamp, and am conflicted. I've seen how the most common configurations are wired, but none of them feature this topology. Textbook inverting configurations require the non-inverting input to be grounded. Inverting configs require the inverting input to feature feedback, but it's input is grounded. Differential amplifiers have another resistor after 0.5R to ground.

I also understand that, ideally, the voltage at the input terminal should be the same as the output of the mirror, since no current flows in or out the terminals (in an ideal amp) and there's a virtual ground between the two terminals.

Any pointers on how to decipher this are appreciated.

• The inverting input V2 has a gain of -2 while the non inverting input has a gain of 3 yet only half the AC input of V1. The R/2 is not relevant. DC bias and Vcc are neglected as is Vbe. – Tony Stewart EE75 Feb 4 at 2:36
• Why is the DC neglected though? There's no coupling capacitor. And why half the AC input? – user3115020 Feb 4 at 2:57
• I was just following you previous remark about previous questions and assume base voltage is zero. A current mirror from 2R to R reduces voltage /2 – Tony Stewart EE75 Feb 4 at 3:36
• @user3115020 There's no current at the (+) input to the opamp, as an ideal opamp doesn't sink or source current at either input. So the current in the 0.5*R resistor is zero. So it's voltage drop is zero. So the (+) input is at Q2's collector voltage. It does NOT matter what the 0.5*R resistor is changed to. You may as well just short it out for analysis. Unless the opamp isn't ideal. – jonk Feb 4 at 7:37