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Suppose I have a PWM signal whose duty cycle varies between 0% (logical LOW voltage all the time), 50% all the way upto 100% (logical HIGH voltage all the time.)

In case of 50% it easy to measure with an input capture module, but when it is 100%, there is neither rising nor falling transition to the input signal (hence the input capture module can't trigger start/end of the signal.)

Is there a standard way to deal with this exception in the input capture code?

Actually I am trying to implement it for an STM32F030C8 using Timer17 peripheral in input capture mode. I have a few peripherals which output PWM signal in normal scenarios and an "always HIGH" signal in case of errors. That is the need for measuring a signal with 100% duty cycle.

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Obviously you cannot measure the duty cycle of an 'always high' signal. You can however detect that there have been no transitions in the last period or two.

How you do this varies with what hardware you are using, and how many periods you can tolerate elapsing before you know about it.

One method is to use a retriggerable monostable external to the MCU. This could be a 555 or an HC123, or as crude as a diode/resistor/capacitor followed by a schmidt buffer. If the transitions on the signal stop, then eventually the monostable time will run out, and it can interrupt the MCU.

If the MCU has watchdog hardware, you might be able to use that directly, if you're not using it for its proper purpose, and it's fast enough.

Different MCUs can detect activity on pins in different ways, read your MCU pin description carefully.

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