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Let's assume we have this circuit:

schematic

simulate this circuit – Schematic created using CircuitLab

I was looking in creating a costant current sink but I have found something very interesting. Assuming V1> Vzn(D1) if we increase V1 we increase the voltage at the base of the NPN and PNP transistor ( a little bit) ->Ie(NPN) is increased and Ie(PNP) is decreased. However the R6 resistor sees the current flowing through the collector of the NPN transistor and the current flowing through the emitter of the PNP transistor.However the emitter current current > collector current so it sees less current with increase of V1?Negative differential resistance or what?

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  • \$\begingroup\$ The whole point of a resistor + zener is that the voltage at the zener cathode is stable and immune to variations of \$V_1\$. That said, there's always the zener impedance to deal with. So this isn't perfect. Therefore, you will see some small variation there. But if keep \$V_1\$ variations reasonable, it won't be much. You've got an emitter follower with the NPN, with \$R_8\$ as the load. But then you have stuck in \$R_6\$ which complicates the idea in ways that make little sense on the surface. So what was your idea in including \$R_6\$ that way? \$\endgroup\$
    – jonk
    Feb 7, 2021 at 2:37
  • \$\begingroup\$ R6 is the emitter resistor of the PNP emitter follower as well as the collector resistor of NPN. \$\endgroup\$ Feb 7, 2021 at 9:31
  • \$\begingroup\$ yes, I can see that much. As you've selected an answer I'll drop any further questions. \$\endgroup\$
    – jonk
    Feb 7, 2021 at 10:32

1 Answer 1

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This is neither a constant current (CC) nor a current source. To mirror the currents in each transistor, both Vbe's must have identical voltage by shared Vbe's. You have shared all CBE to EBC so CE has the opposite polarity.

  • The net effect is Vce will always have the value of 2 diode drops = NPN Vbe + PNP Vbe

  • but Vce will actually change somewhere within from 1.2 to 1.3x as you adjust V1 to swing all the current from Q1 to Q2. (Then the off transistor is well below 0.6 and the on transistor then rises according to the collector current you pull.)

  • The collector acts a current sink and the emitter as buffered base voltage.

  • Yet all transistors have Ic defined by Vbe when biased properly.

  • Raising V1 will pull more current from PNP's emitter , since the base Vb almost fixed by Vz.

    • so there will be a critical voltage threshold for V1 in mV where each transistor shares some current.

I can't think of a useful application for this but now you better understand how transistors can be controlled by Vbe. These would be very temperature sensitive to balance the exact same Ic in each.

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