What logic function does this layout implement?

Question

I'm having trouble wrapping my head around the following layout. I can't understand what logic function it is implementing.

For what I understand the rightmost side implements a CMOS inverter with input "a". The leftmost one is also a CMOS inverter with input y1 and output y2. Finally at the middle we have a NMOS and PMOS with both gates connected to "b", source connected to "~a" (is it though? the NMOS is missing a contact), and drain connected to y1. I can't understand what logic function it implements. Can someone help me?

EDIT: My attempt on schematics

Answer 1

Since the only parameter we're missing in order to find the boolean function this circuit implements is y1, let us look at the CMOS in the rightmost diagram that you have drawn, since it is a fair simplification of the circuit.

Suppose that a = '0'; The PMOS will enter the cutoff region, since its Vsg will be less than |Vt|, no matter what b's logical value is equal to. However, the NMOS will always be at either the saturation region (when b = '0') or the linear region (when b = '1'), so in this case where a = '0', the PMOS will be cutoff, and the NMOS will conduct, such as that its drain voltage will be equal to its source voltage (a, in this case, which is again, equal to 0). An example circuit for one of the mentioned cases:

^{simulate this circuit – Schematic created using CircuitLab}

Figure 1: a = '0' and b = '0'. Simulation shows y1='0'.

Now that you (hopefully) understood what I've explained so far, ask yourself these questions - what happens to the MOSFETs in the other cases, where a='1'? What will y1 logical value be equal to in these cases? And finally, after arriving at some conclusions, it will be possible to construct a truth table in order to find y1, which in turn would help you find y2.

Oh, and you could also simulate the circuit if you get stuck, and then try to explain to yourself why the simulation shows that specific value for y1 :)