# How to properly drive parallel analog switches (variable capacitive loads) with opamp(s)?

So as you can see I have 16 SPDT switches on one side of my 16 'RUT paths' and 16 SPDTs on the other side. Each SPDT(ADG1434) has two source pins (SXA and SXB) and a common drain pin (DX), 'X' represents the SPDT switch number from 1 to 16 (on one side). Now all the SXA pins are shorted to form 'SXA line' and all the SXB pins are shorted (one either side) to form 'SXB line' and I want to send a pulse voltage (in the range of ±3.5V amplitude, 5us width, and 50ns rise and fall time each) through the switches (using SXAs/SXBs on the left and on the right). The opamp and the switches in the picture are powered using ±15V

I chose a capacitive load driver AD817 for this task. As you can see each 'RUT path' has a switch on the left and after the switch (through the switch path), there will be a resistive load (variable between 60-200kohms) in series and again one more switch (more capacitance), and finally, the path ends either in ground or ends at the output of another opamp (through the switch on the right).

Since the switches have a typical Cs(OFF) of 12pF, Cd(OFF) of 22pF, and Cds(ON) of 72pF, I'll be driving a good amount of capacitive loads when shorting all the SXA's together and shorting all the SXB's together. All three lines will be driven separately by three different opamps as in the picture above (fourth line is ground).

From what I understand, all the capacitances will add up since they are in parallel. To give you an idea, let's assume a scenario: Both on the left and the right, D1 is connected to the SXA line while the rest of the 15 DXs are connected to SXB line.

So U1 sees, 1*72pF (source drain ON capacitance) + 15*12pF(Source OFF capacitance) =252pF, also for U1 the resistor load (RUT) matters since the path ends in the ground.

U2 sees, 15*72pF (source drain ON capacitance) + 1*12pF(Source OFF capacitance) = 1092pF. U3 sees the same as U2 = 1092pF, For U2/U3, The current requirement wouldn't be much for the resistive load(even if it is 60ohm) since the paths will not terminate to ground but to the same pulse as input, making the potential difference zero across the path.

My questions are:

1. If my understanding of calculating capacitances or anything else above is incorrect, please correct me.

2. Is a single AD817 enough to drive a shorted source line (SXA or SXB) of capacitive load ranging between 252pF-1152pF, with a resistive load of 60-200k ohms (although in the above scenario U1 just has to drive 252pF, there is a scenario where it drives 1152pF with a minimum 60ohms resistive load)? If I simulate (result here) the worst-case scenario (cap load of 1152pF and res load of 60ohm) it overshoots a lot and oscillates for some time before settling which is very bad.

3. For U1, Do I need to consider the input (drain) capacitance of the 2nd switch (after the resistive load) at the end of the path even though it is shorted to the ground?

4. Should I rather divide (instead of shorting) the source (SXA and SXB) lines into chunks with multiple AD817 so that each opamp sees less capacitance? Do you have a specific idea regarding this?

5. Is there a better way of doing this? For instance, when simulating using a LTC6228, I have used 10ohms resistor for adding a zero (to compensate the pole created by the capacitor load) and it looks like it works except for the fact the 10ohm drops quite a lot of voltage for a load resistor of 60ohms (I would like almost all the voltage of the pulse to be dropped on the resistive load and maybe a bit on the 'on resistance' of the switches) that is why I chose AD817 since it can drive capacitive loads.

6. If the current output of an opamp reaches the peak short-circuit current (when charging a capacitor and/or passing through a resistive load) for a short time (let us say 10-100ns), would it cause any damage to the opamp (AD817)?

7. If this question is a bit confusing, some general suggestions regarding ways to drive analog switches (with or without opamps) are also welcome. I couldn't really find anything on the internet that directly talks about driving analog switches.

Edit: The SPDT switch has two source pins and one drain (common) pin. Both of them can be used as inputs or outputs. 'SXA line' and 'SXB line' (I just named them like that since they are connected to S1A, S2A....S16A pins and S1B, S2B....S16B pins respectively). I didn't want to complicate the question but one more addition I can add is removing the ground and adding a virtual ground which is basically a TIA to measure the current of a 'selected' RUT. The 'selected' RUT will have a pulse from one direction (left SXA line, using U1) and a TIA to measure the current in the other direction ( right SXA line, which is shown as the ground in the above schematic). The 'non-selected' 'RUT' will have pulses from both directions (SXB lines on the right and left, U2 and U3) and hence a zero potential drop. This functionality is needed. All three opamps fire at the same time and also fire the same pulse. It is the switches that decide which opamp line connects to which RUT path. It is important that the RUT sees almost all the voltage of the pulse.

• What you call source inputs (presumably you mean inputs to the circuit) are connecting to op-amp outputs or 0 volts. This is confusing so maybe you should explain what SXA and SXB actually connect to. It might also help if you explain what you are trying to build. Commented Feb 13, 2021 at 17:55
• Can you use the circuit tool (and edit your question) and draw a new schematic? Commented Feb 13, 2021 at 18:01
• @Andyaka. Sorry for the confusion. Please let me know if the edit helps. Commented Feb 13, 2021 at 18:35
• @VoltageSpike I have added a sample schematic from LTSpice in my question (1) for a single RUT path (out of 16), Is it really necessary to draw all 16 of them? It would look very messy. Commented Feb 13, 2021 at 18:36
• The closed loop output impedance of these 80MHz GBW Op Amps is around 5 Ohms near the resonance in your simulation ~ 1MHz. Adding series R would dampen the mismatched switched impedance but add to insertion loss when load is 60 Ohms. Commented Feb 13, 2021 at 19:07

Is a single AD817 enough to drive a shorted source line (SXA or SXB) of capacitive load ranging between 252pF-1152pF, with a resistive load of 60-200k ohms (although in the above scenario U1 just has to drive 252pF, there is a scenario where it drives 1152pF with a minimum 60ohms resistive load)? If I simulate (result here) the worst-case scenario (cap load of 1152pF and res load of 60ohm) it overshoots a lot and oscillates for some time before settling which is very bad.

You also need to put in a few mΩ for trace resistance and also a few nH for trace inductance. Just simulating capacitance will not yield real world results, because the real world has parasitics. Make sure you also use capacitors that have some ESR and ESL, no real world capacitor is ideal. Another thing is how fast does the amplifier need to run? Or how fast of rise times? If you only need a 1us rise time then restrict the op amp closed loop response to be 1MHz. If you do need the fast rise times in ns then you'll have to worry about the capacitance.

For U1, Do I need to consider the input (drain) capacitance of the 2nd switch (after the resistive load) at the end of the path even though it is shorted to the ground?

No, the resistance of the switch is roughly 4Ω, so the load will not be totally capacitive. The amps will not see the output capacitance.

Should I rather divide (instead of shorting) the source (SXA and SXB) lines into chunks with multiple AD817 so that each opamp sees less capacitance? Do you have a specific idea regarding this?

I think you'll find that once trace parasitics are put in the simulation it doesn't ring as much. You don't need to worry about output capacitance.

If the current output of an opamp reaches the peak short-circuit current (when charging a capacitor and/or passing through a resistive load) for a short time (let us say 10-100ns), would it cause any damage to the opamp (AD817)?

Most likely not, usually the short circuit condition is a problem from internal heating to the output transistors. Another thing is inductance will prevent large currents.

• Thank you. The amplifier doesn't have to run fast. Even a 500ns rise/fall time would work or maybe even 1us in the worst case. How does one 'restrict the op-amp closed-loop response bandwidth' Do you mean I need to increase the closed-loop gain? Commented Feb 13, 2021 at 21:04
• Can't do it with a unity gain feedback, you put a cap across on the of the gain resistors, it makes an RC timeconstant and filters the overall response Commented Feb 13, 2021 at 21:17
• So all I need to do is convert the buffer configuration into a non-inverting amp. config with two resistors and put a cap on the feedback resistor? And if I need to keep the gain close to unity I can use a larger input resistor to feedback resistor gain ratio (like maybe 1/50, gain being 1+1/50≈1)? What do you think? Commented Feb 13, 2021 at 21:53
• Or maybe a low pass filter (critical frequency around 1.5MHz) before the unity gain follower? Commented Feb 13, 2021 at 22:32
• Yes, this circuit shows how you can limit the bandwidth: electronics.stackexchange.com/questions/138160/… with an opamp, You'd need to change the unity gain to an opamp with resistors and put a capacitor on the gain resistor. If you want a gain of 1 then keep the resistors the same (which might be hard if you want to use a non inverting configuration) Commented Feb 15, 2021 at 17:27