I currently have a 3-bit asyncronous counter (built using J-K flip flops) that continuously counts up. However, I am struggling to figure out how to reset the counter to 0 when an input (Reset) is true.
According to the J-K flip-flop truth table, when J = 0 and K = 1, Q = 0. Thus, I feed the clock signal into the K inputs of the flip-flop generating the least significant bit but I feed into the J input the opposite of the Reset input (chaining a NOT gate to it). Below is my asyncronous 3-bit counter:
However, when Reset is activated, the counter freezes instead of being reset to 0. This seems strange, considering that I am following the boolean algebraic properties of the J-K flip-flop.