I made a simulation for a simple output buffer to use more current for an operational amplifier. The goal is to achieve a precise output voltage at moderate speed (This is considerd a DC application) but a maximum current of 1.1A. The amplifier is controlled by V3 which is a DAC in the real application. The DAC provides voltages from 0 to 2.5V.
I decided to use a current mirror (Q4, Q5, Q3, Q6) to provide the current for controlling the output transistors (Q7, Q9, Q1, Q8, Q10, Q2). Some negative feedback resistors are used to prevent asymmetric current through the output transistors.
At this point the circuits works in the DC simulation but the output voltage can't get any higher than 15V. This is where I need help because it would be nice to use the full output range if possible which not much more parts.
Edit 1:
Thanks for all the Answers so far. I modified the design to use a much simpler one with less transistors (See the picture below). This is from the LT application note where I modified the input to structure to map positive inputs to positive outputs and shift the input by (Explained above why).
I can get DC analysis to work in ngspice but not transient analysis. Here is the DC analysis result for the output voltage over the input voltage V1.
DC Analysis looks good and the power dissipation for the resistors is as expected to shared over them. In the real circuit a tweaking of the feedback resistors might be needed. Transient analysis looks like this and I have no clue why.
I think that is a simulator problem because in theory the circuit should work when prototyping. Maybe you guys have some ideas. I tried simulating much longer but that doesn't change the result.
Edit 2:
Now I measured the open loop gain to get the phase of the output. The output is in phase with the input at around 535 kHz.