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I made a simulation for a simple output buffer to use more current for an operational amplifier. The goal is to achieve a precise output voltage at moderate speed (This is considerd a DC application) but a maximum current of 1.1A. The amplifier is controlled by V3 which is a DAC in the real application. The DAC provides voltages from 0 to 2.5V.

I decided to use a current mirror (Q4, Q5, Q3, Q6) to provide the current for controlling the output transistors (Q7, Q9, Q1, Q8, Q10, Q2). Some negative feedback resistors are used to prevent asymmetric current through the output transistors.

At this point the circuits works in the DC simulation but the output voltage can't get any higher than 15V. This is where I need help because it would be nice to use the full output range if possible which not much more parts.

enter image description here

Edit 1:

Thanks for all the Answers so far. I modified the design to use a much simpler one with less transistors (See the picture below). This is from the LT application note where I modified the input to structure to map positive inputs to positive outputs and shift the input by (Explained above why).

enter image description here

I can get DC analysis to work in ngspice but not transient analysis. Here is the DC analysis result for the output voltage over the input voltage V1.

enter image description here

DC Analysis looks good and the power dissipation for the resistors is as expected to shared over them. In the real circuit a tweaking of the feedback resistors might be needed. Transient analysis looks like this and I have no clue why.

enter image description here

I think that is a simulator problem because in theory the circuit should work when prototyping. Maybe you guys have some ideas. I tried simulating much longer but that doesn't change the result.

Edit 2:

Now I measured the open loop gain to get the phase of the output. The output is in phase with the input at around 535 kHz.

enter image description here

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  • \$\begingroup\$ Some negative feedback transistors are used to prevent asymmetric current through the output transistors. - I don't see them. Maybe you can explain that bit? What does V4 do? \$\endgroup\$
    – Andy aka
    Feb 16, 2021 at 11:38
  • \$\begingroup\$ V4 is used as voltage reference because the amplifier forms a subtraction circuit which implements Vout = A * (V3 - 0.5 * Vref) where V4 is Vref. This is needed because V3 has to be positive all the time (DAC output is positive). The negative feedback is provided by R9 - R14. \$\endgroup\$
    – Gustavo
    Feb 16, 2021 at 11:53
  • \$\begingroup\$ Your text says negative feedback transistors and not resistors. \$\endgroup\$
    – Andy aka
    Feb 16, 2021 at 11:57
  • \$\begingroup\$ I suspect also that you are not showing the true load so, can you only achieve 15 volt peak output signal with a 1.1 amp load current? Please be clearer about this. \$\endgroup\$
    – Andy aka
    Feb 16, 2021 at 12:15
  • \$\begingroup\$ Sorry for that. Indeed there are feedback resistors. The true load is 13 Ohm \$\endgroup\$
    – Gustavo
    Feb 16, 2021 at 12:32

3 Answers 3

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If you look at the data sheets for the transistors used you will see that there will be roughly 0.7 volts dropped across Q5 in saturation, 0.367 volts dropped across the 1 Ω emitter resistors and about 0.7 volts dropped across the base-emitter regions of Q1, Q7 and Q9: -

enter image description here

This roughly tells me that with a positive supply of 17 volts, the maximum peak positive voltage on the output into a 13 Ω load is going to be about 15.23 volts.

To get a higher peak output voltage requires either a fundamental change in the way your output stage is wired OR using bootstrap circuits but, bootstrap circuits will only work well when there is an AC content to your signal.

Alternatively, you could use DC-to-DC converters to raise the driver voltage supply 1.5 to 2 volts above the positive rail and 1.5 to 2 volts below the negative rail.

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  • \$\begingroup\$ I understand the voltage drop and another simple design from my edited post has been simulated but I can't get transient simulation to work. \$\endgroup\$
    – Gustavo
    Feb 18, 2021 at 16:18
  • \$\begingroup\$ Split the circuit in two and feed 0 volts into where the op-amp connects to R8 - does the output still oscillate? If it does then you have tracked the problem down to at least 50% of the circuit. I expect that there is too much phase shift around the loop and you have created an oscillator @Gustavo \$\endgroup\$
    – Andy aka
    Feb 18, 2021 at 18:19
  • \$\begingroup\$ I did that and the transient worked with a lot offset but that was expected. So there is too much phase shift I have trouble to get rid of in the simulation. Maybe that is the opamp model which is very simple like the model from bobflux. I use ngspice and in my experience opamp models do not work well in ngspice and spice in general. \$\endgroup\$
    – Gustavo
    Feb 18, 2021 at 19:46
  • \$\begingroup\$ The problem @Gustavo is that op-amps are designed to run with direct feedback from their own output. But you have two more transistors in the feedback path and, although they don't add loop gain, they will be slower than the op-amp and add significant phase shift at some unholy frequency and turn the circuit into an oscillator. It's a common thing to happen and you have to find a way of slugging the op-amp circuit so that the gain drops below unity at the frequency of oscillation. That might work with local negative feedback using (say) 100 pF or smaller. \$\endgroup\$
    – Andy aka
    Feb 18, 2021 at 19:54
  • \$\begingroup\$ I tried that with a lot of values in ngspice but none of these from 1pF to 10nF seems to work. Some values as feedback capacitance work better but there is always some oscillation in the circuit from my edit. \$\endgroup\$
    – Gustavo
    Feb 21, 2021 at 16:20
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Here's a dumb booster using MOSFETs.

enter image description here

The circuit on the left is the opamp, because you can never trust an opamp Spice model to implement the power supply business as you expect, for example the model could contain dependent voltage/current sources to GND, which means the current in or out of the supply pins will be bogus.

So, replace the mess with an opamp. Bottom pin of R4 goes to opamp's VCC, top pin of R3 to opamp VDD. R6 forces the opamp to output a current, which comes from its supply pins through its output transistors (Q7 Q6). This drives the gates of the FETs which make a rail to rail output current booster. R1/R2 are the feedback network. C2 is required for compensation, make sure to pick a value that makes the circuit stable. The FETs will get extremely slow as the output gets squeezed against the rails, so if it does oscillate, it will be when output voltage is close to the rails.

Note this is a very simple circuit which will have pretty bad transient response as the FET gates are not properly driven. If this is made to output AC, expect cross-conduction in the FETs.

EDIT:

If you can tolerate a bit of ripple in the output, a class D amp chip would be more efficient, for that more modern "no heat sinks" sleek feel.

If you go this route, I'd recommend IRS2092S. It's a simple chip. It does not include the output LC filter in the feedback loop, which means there are no stability issues if you overdo the filter. So you can use an output filter with a low cutoff frequency, which for only a few amps will cost a few bucks in inductors and caps. Since you don't care about harmonic distortion and output voltage is low, MLCCs would do nicely for the output filter caps. With a 4th order filter cutting off at around 5 kHz, the 200kHz switching frequency should represent just a tiny blip in the output. More conventional MOSFET drivers could also be used.

To have precision DC at the output, an opamp needs to be wrapped around this power stage. Since the power stage has a pretty low bandwidth due to the output filter, some compensation would be needed, and it wouldn't have the quickest transient response in the universe, but for a DC output, that's OK.

It is not rail to rail though, but this no longer matters since with a switching power stage, dissipation is no longer related to input-output voltage drop.

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  • \$\begingroup\$ As for the MOSFET input voltage, this is the same clever idea - control through the op-amp current consumption; but as for the output, the AnalogKid's circuit solution (Figure 85) is more original - driving a common load both by the op-amp and FET booster... \$\endgroup\$ Feb 17, 2021 at 16:19
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    \$\begingroup\$ Yeah, I wanted it to be rail to rail output, and since the opamp's supplies are one FET Vgs away from the main rails (or one Vbe away if you use BJTs), the opamp output can't drive the load closer to the rail than this. So I didn't go that way. \$\endgroup\$
    – bobflux
    Feb 17, 2021 at 16:30
  • \$\begingroup\$ Interesting considerations... \$\endgroup\$ Feb 17, 2021 at 16:41
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That is a very complex circuit for only 1.1 A of output current. A search for opamp output boost schematic yields dozens of circuits with higher output current and voltage and way fewer parts.

enter image description here

Jim Williams published several app notes that are well known.

Power Gain Stages for Monolithic Amplifiers

Boost op amp output without sacrificing drift and gain specs

Solve oscillation problems when implementing op-amp power-booster stages

High-powered booster circuits enhance op-amp output

To reduce the operating headroom, change the output transistor configuration to common emitter. This is from a Linear Tech app note that shows the basic technique:

enter image description here

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  • \$\begingroup\$ Thanks for the advice. The main reason I'm doing this is to share the Power between multiple output transistores because the worst case scenario is approx. 40W power dissipation for one Transistor which is too much without a massive heatsink to keep the junction temperautr below 120°C. With more than one transistor I still need a heatsink but it doesn't need to have a very low thermal resistance. \$\endgroup\$
    – Gustavo
    Feb 16, 2021 at 14:06
  • \$\begingroup\$ It is interesting to show the idea behind these exotic circuit solutions... The op-amp output and the outputs of the transistor boosters are joined... Why? The inputs of the boosters are connected to the op-amp supply rails... Why? \$\endgroup\$ Feb 17, 2021 at 7:07
  • \$\begingroup\$ The more current flows through the output of the opamp the more Vbe increases through R1, R2 which means the transistors conducts more so you can actually use the operational amplifier as controller for Q2 and Q1. This forms a control loop. \$\endgroup\$
    – Gustavo
    Feb 17, 2021 at 7:48
  • \$\begingroup\$ @Gustavo, Bingo! I wonder if you came up with this explanation yourself? I guess yes because manufacturers usually do not explain circuit ideas but overwhelm us with details... I saw this idea in the 90's in the NS Linear Applications Handbook. It impressed me greatly and I began to look for the explanation. It is similar to yours and develops it further... \$\endgroup\$ Feb 17, 2021 at 9:58
  • \$\begingroup\$ The powerful transistor buffer is connected in parallel to the weak operational amplifier and "helps" it when "feels" the op-amp needs help. So, first the op-amp tries to change the load voltage... and, as a result, its load current increases. The "big brother" senses this through the resistors R1, R2 acting as 'current-to-voltage converters' and produces the strong current that completes the "desire" of the "little brother"-:) \$\endgroup\$ Feb 17, 2021 at 9:58

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