4 Layer PCB Local Pours on Signal Layers

Question

I'm in the middle of placing components on my first 4-Layer PCB. Layers are Sig-GND-Vcc-Sig. I2C/SPI/UART, up to 20MHz MCU, nothing exceptionally fancy.

I have decided to check with the community whether I'm doing things right. I use small polygon pours with a pair of vias for the ground connection for small groups of decoupling or bulk caps, so I was wondering if I'm doing it right. Because if not, I better restart while I still haven't wasted too much time on doomed layout.

Here is an example of my boost converter, output of which is supposed to go down to the power plane (which doesn't take the entire layer, but bigger rectangular part of it).

The boost converter itself is this: Datasheet (if anyone wants to have a look; I need 1A at most).

Please, roast my layout and tell me why this is bad and how can I improve it (I don't expect it to be good considering I'm losing 4-layer virginity here). Thank you.

Answer 1

One of the main concern's is the common GND point. A swicher should have the GND on the output caps as the preferred point, which it looks like you've done however 1 via per cap minimum. You may also want to put a 0.1uF cap on the input and output. Not many suppliers mention it, but it is important for EMC. I also tend to add a ferrite bead to the output, it will improve the stability of the PSU if driving a high load capacitance.

0402 caps might be an issue. Have you checked their capacitance at the applied voltage? You might be shocked as to the value. I always try for 0805 or bigger.

I would tend to run the fb loop on the top layer and the en pin lower down the stack, think about what lines are critical, and which don't matter. Maybe also try to make the copper fit the pad, when you hang over the sides, you increase the chance of a short.