Consider the instruction LDM R4!, {R0-R3}.

Does the instruction LDM R4!, {R0-R3} load the MEMORY ADDRESS pointed to by R4 to R0 and 4 plus the MEMORY ADDRESS pointed to by R4 to R1 etc, or will the instruction loads THE VALUE LOCATED AT THE MEMORY ADDRESS contained in R4 to R0 and THE VALUE LOCATED AT THE MEMORY ADDRESS 4 bytes above the memory address contained in R4 to R1 etc.? In other words, after the instruction, will R0=&R4 and R1=(&R4)+4 or R0= *(unsigned int)R4 and R1= *(unsigned int)(R4+4)?

  • \$\begingroup\$ Looks correct. But this is a yes/no question that can be answered by looking at documentation. \$\endgroup\$ – Eugene Sh. Feb 18 at 14:27
  • \$\begingroup\$ @EugeneSh. Are R0= *(unsigned int)R4 and R1= *(unsigned int)(R4+4) correct? \$\endgroup\$ – YuanLinTech Feb 18 at 14:30
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    \$\begingroup\$ Each register is 4 bytes long, so yes, it will copy a 4*4 memory size into 4 registers R0~R3 \$\endgroup\$ – Eugene Sh. Feb 18 at 14:31
  • \$\begingroup\$ &R4 doesn't make sense. Registers don't have addresses. What does &R4 even mean? \$\endgroup\$ – user253751 Feb 18 at 14:32
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    \$\begingroup\$ @YuanLinTech Don't assume that the values in registers (or in memory for that matter) are always unsigned...the processor doesn't know whether you think they are signed or unsigned. Also, the type of a register is better describe as int32_t or uint32_t since the width of an int is not fixed. \$\endgroup\$ – Elliot Alderson Feb 18 at 15:43

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