I worked with 1553 a lot during my career. A high-level block diagram looks like this. The Controller and Transceiver are sometimes combined into one package.
In my experience, the Controller is always logically separate from the Processor. The latency requirements make it extremely difficult for a processor to handle via software. Of course, a System-On-Chip may combine them in the same die.
The controller design is difficult. The basic messages aren't too complicated, but there are a lot of special messages. A fully qualified design implementing BC, RT and M functions would take a team of people 6 months or so. Companies sometimes integrate the 1553 Controller into an FPGA/ASIC along with other non-1553 functions to minimize component count. The IP can be purchased, or if you are building enough units, designing your own can be justified.
Hopefully your thesis only involves the Transceiver. Note that there is no need to build your own Transceiver from scratch anymore, they are available from several companies.
The Transceiver normally does not decode/encode the Manchester signals, this is done by the Controller. The Transceiver drives and converts the analog voltages to/from logic levels.
A transformer is always required near the Transceiver (isolation is a requirement). The turns ratio is chosen to get the required output voltage (~22Vpp) from the IC voltage (normally 3.3 or 5V). There may also be a second transformer coupler at the bus connection.
An important concept to remember about 1553 is that it is a three state bus, the third state is IDLE (no voltage) and must be considered separately. e.g. the Transceiver RX/RX_N signals are not complementary, both inactive indicates the IDLE state.
https://apcplc.com/hideout-app/app-uploads/2018/06/hi-1590_v-rev-d.pdf (red edits mine)