While looking at Validation Reference Platform for 11th Gen Intel CPU (Tiger Lake UP3), I noticed that some pins for the MCP (Multi Chip Package, which is a package that includes PCH+CPU on the same chip), I found out that some pins can be used both as PCIE and USB3. I was wondering how we choose what protocol can be used each time?

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    \$\begingroup\$ I can't speak for Intel CPUs but in microprocessors/microcontrollers, there is usually an internal mux controlled by registers. There will be bits that control the usage of each line or set of lines. For example, one bit in a register would select PCIE1 vs USB31_1. \$\endgroup\$
    – DoxyLover
    Feb 22 at 7:57
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    \$\begingroup\$ The datasheets/manuals containing this kind of information usually come with an NDA, preventing discussions here in the open. \$\endgroup\$
    – Turbo J
    Feb 22 at 8:40
  • \$\begingroup\$ Yes, I Agree. but I thought this is a general question that is relevant to any CPU. anyway, I can delete this question if it's against the NDA although I'm not sharing any datasheet. (this screenshot doesn't include anything special) \$\endgroup\$
    – Xhero39
    Feb 22 at 9:19
  • \$\begingroup\$ Thanks, @DoxyLover \$\endgroup\$
    – Xhero39
    Feb 22 at 9:21
  • \$\begingroup\$ I suspect the correct answer will mention Thunderbolt, USB-C, and possibly USB4. The selection of which protocol uses those pins must be based on the alternate mode used on a USB-C port. I speculate but it seems logical. \$\endgroup\$
    – MacGuffin
    Feb 22 at 10:06

Use of configurable multi-purpose pins was there in microprocessor industry for ages. Even simplest MCU as 8-bit Silicon Labs processors have pins that can be openly configured by user's firmware.

Processors of x86 complexity usually have thousands of configuration registers, accessible usually via a secure protocol. Whoever makes a specific device/mainboard with specific use of these nearly general-purpose ports, they use an encrypted protocol within its BIOS to configure these ports in accord with how they are hardwired. Some manufacturers can use these pins as PCIe, some as USB3. These pins are not "used each time", they are used/configured only once on boot, in accord with how they are routed on PCB, to which ports (PCIe slot or USB connector). This hardware obviously don't change on a particular product.

If this is a "validation reference platform" where these pins can be routed to universal (SMA type) RF coax connectors, you need to contact Intel, they might help you (if your product is expected to ship in quantity of ~50k per week). But generally it is not your (customer's) business to conduct processor validation, it is done by manufacturer.


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