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Xilinx's official DisplayPort IP (seems to be from 3rd party) support HBR2(5.4Gbps) on 7-series and HBR3(8.1Gbps) only on UltraScale.

But GTX tranceivers on Kintex-7 already support 12.5Gbps, is there any physical reason (like physical signal formats) that HBR3 can't be supported by GTX tranceivers? If there is no such reason, then a more advanced (i.e. more parallelization with more resources) IP could get HBR3 on Kintex-7.

There is also the future DP2.0 which supports 10Gbps/13.5Gbps/20Gbps, it is possible to get 10Gbps on Kintex-7 and 13.5Gbps on Kintex UltraScale's GTH tranceivers if there is no physical reasons.

Note: only -2 devices are considered.

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  • \$\begingroup\$ This is probably best asked on the Xilinx forums, the answer could be as simple as the 7 series is much older than the HBR3 spec and xilinx doesn't want to spend the resources validating the IP core for such an old series. \$\endgroup\$ – alex.forencich Mar 2 at 9:22

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