Source Data Out CMOS drivers are about 50 Ohms similar you any 5V uC logic or 25 Ohms for <3.6V logic so adding 100 to 150 Ohms at the source is necessary to dampen twisted pair impedance of around 220 Ohms . The datasheet shows how to decouple the Vdd LED noise current with an RC filter, so the signal is clean until the next IC which operates as a repeater.
You cannot simple use loose wire from the controller with Vdd, 0V and self-clocked data as a controlled impedance.
The heavy wire you show has capacitance to ground (0V) and is inductive with ~ 1uH / m and this causes a high frequency RINGING from a series low R-LC resonant frequency. In order for data to have good signal integrity over wires, the signal impedance must be kept low for the rapid rise time and have a series impedance to match. Since the CMOS DI input is high impedance, there is no attenuation of voltage. Thus after each chip there is LED PWM noise current added to cause ground shift voltage noise from the inductance V=LdI/dt.
Successive additive noise reduction with the RC filter per IC and twisted pairs is necessary. Very long lines near other EMI sources will need more care.
e.g. 150 Ohm series R from Driver, perhaps shielded cable, Baluns , etc.
This is what the datasheet shows.
Below is my model of your photo wires with CMOS data to the chips, You want a flat spectrum up and no peaks up to 20 MHz.
With loose wires , this is your data transmission line with CMOS input capacitance and 1uH /m per wire (DO+Gnd//Vdd)
The 1st leg I guestimated with 6m of wiring. then 60 cm after that. (30cm x2)
300 Ohms almost flattens the response. A different cable requires a different dampening R. 1 twist per inch, a bit more is lower impedance for 220 Ohms.
The switch is just my simulation ease of demo.
Is there anybody here who can help?is not a technical question about electronic design ... you have not asked any specific, answerable questions \$\endgroup\$