The designers are using the dots for a logical connection without a physical connection.
The dotted inverter does not exist in their final design.
They have a write signal \$ \overline W\$, which they rename INV_B_IN, which is put through an inverting octal driver to create INV_B_OUT, which is the same impact as an inverter. Not all of the inverters on the octal inverter are required for their design, so they appear to be used as required.
I'd guess that in their initial versions, there was a physical inverter, but they realized it was not required, so they could save an inverter, but they left it in to make functionality easier to understand.
There are three inputs IR5-IR7 fed to a 3 to 8 mux. The 8 outputs are ORed via diodes to create 5 commands which are inverted via an octal buffer to create AL and AR0-3 (active high), which is sent to the ALU.
This leaves 3 NOT gates, which they use on the right of the schematic. INV_C, INV_A and INV_B.
The key is:
XXX breakdown symbol into 8 inverter gates
Their intentions were to breakdown the octal buffer into 8 NOT gates and place them as required, but never got around to it. The dotted lines were probably a place holder for this future operation. Instead they used net names to implement the physical connections.