EEPROM Fatigue - Does it affect only the cells being written excessively, or will it cause global failures?

Question

We have an EEPROM with a 10,000 cycle life duration - Our application may write more than 10,000 times.

If we write to the same location over & over, is it only that single location that potentially fatigues and fails? Or would the failure extend over multiple cells?

I'm thinking an easy way to get round the limit is to dedicate 10 memory locations and use a rotating pointer. That would (I think) increase my potential write cycles 10x before it becomes an issue.

Am I heading down a good path, or is this totally the wrong thing to do?

Many folks are wondering why I don't just use another part, or one that's better documented. The EEPROM is built-in to this one. In our business, we're locked into a few suppliers who make very specialized ASIC's and who don't document their chips such that I can just read this in the datasheet. Their engineers all speak English as their 3rd or sometimes 4th language, so asking this kind of question is usually quite difficult and answers always taken with a grain of salt. They make up for these annoyances by selling stupid low cost chips. We have micro's available to us that cost about 3 cents each (no exaggeration). Most of our IC's are about $0.15.

Answer 1

EEPROMs don't wear out from writing, they wear out from erasing. If you look at the datasheet you'll notice that it states erase cycles.
Erase operations are block based. So an entire block of data is erased at once. And in your case you can do this at least 10k times to each block.
Your idea can work, but any wear leveling algorithm needs to be block based, otherwise it will not provide additional life to the chip.

Also, in my experience, that number in the datasheet is fairly conservative in order to guarantee coverage under all temperature extremes. So at relatively modest temperatures (close to ambient) you may get many more cycles. In one chip that we had this issue with, it was specified at 50k cycles, but we routinely got close to 300k before issues arose.

And finally, as part of your algorithm, after you erase the block, do a check to make sure all bits were reset. If not, then erase again (up to two times). We found that this greatly extended the useful life of the flash, as the failure mode is not hard, but more of a soft curve.

If you want to avoid all the extra algorithm stuff, you can usually find an FRAM chip that is a drop in replacement for most EEPROMs. They do not have the same wearout mechanism and can be erased/written 1 Trillion times typical.

Answer 2

As Graham Nye pointed out in a comment, where are you going to store your write and read pointers?

I think most flash controllers (SSDs etc.) which implement wear leveling either use more durable non-volatile memory for the pointers or keep them in volatile memory and only write them to flash before they run out of power.

In a data logger I helped develop we made use of the fact that our EEPROM erased to all 1s and our data was guaranteed to never be all 1. So we just had to search the whole EEPROM on startup to find our data and initialize our pointers ;)

Answer 3

EEPROMs usually can't write a single location (although it may be appear that way to the user), they read, erase and write a block (16 locations or so), so unless your rotating locations are far enough apart, your idea won't help. The multiple locations in a block will wear out together.

Page writes are described in the datasheet, but blocks (smaller than pages) are usually not. I found out about them during an in-depth analysis of EEPROM failure mechanisms. Only the manufacture knows how their chips work internally.

Answer 4

What you propose is a technique called wear leveling. That is, write to different locations over time to spread the activity across more cells.

A difficulty with EEPROMs is that they're block oriented (and fairly large blocks at that.) So the 'wear' of a write affects the entire block of cells. If you have to write stuff more than a few times, it's not such an appropriate technology for you.

Can you consider NOR flash instead? This has better write durability than EEPROM.

Answer 5

Fatigue only affects the cells that have accumulated too many write cycles but be sure you read the device manufacturer's datasheet to understand what they mean by cycles. Not all behave the same say.

But the general method of what you're suggesting is commonly used and is effective.

I'll also note that there are many EEPROMs on the market today that offer more than 10K cycles. You might want to shop around if that's an option.