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I have a project where I am using two clocks at the same frequency, with one having a -90 degree phase shift. The FPGA board I am using is an Nexys A7-100T configured with Vivado in VHDL.

I have used in internal clock on the board with a constraints file which is pin E3 at 100MHz. I have then created a component with the clock wizard on Vivado that takes the input 100MHz clock and should output two 5MHz clocks; Clock1 and Clock2 with Clock2 having the phase shift.

Now when testing my design it did not work so I decided to test the two clock signals by running through clock divider counters bringing them out on an separate LED on the FPGA board.

When I run the design there is no phase shift on the clocks as both LED's blink at the same time, explaining why my design won't work.

My question is has anyone came across a problem like this before? What is the only information I have to enter in the images below to do such a simple clock setup?

I don't have access to Vivado currently to provide images of my clock wizard setup, but I will show a Google image of the wizard and I have entered all the above information correctly.

Thanks for any help, I am unsure what to do.

EDIT

Here are screenshots of my clock wizard settings:

enter image description here

enter image description here

Here is my screenshot of the oscilloscope measurements below. The clocks show the 90 degree phase shift but I am unsure why they appear 'rounded'. Is this an issue with my measurements on the oscilloscope?

enter image description here

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    \$\begingroup\$ As noted in Nipo’s answer, your test does not provide sufficient verification of the 5 MHz phase offset. Can you elaborate on “when testing my design it did not work”? \$\endgroup\$
    – Blair Fonville
    Mar 11, 2021 at 2:16
  • \$\begingroup\$ I am creating a RISC processor on an FPGA. These two clocks are used to enable data from registers onto a data bus and the other clock with the phase shift is to store data in registers from the data bus. Both scenarios use the rising edge of each clock. I have tested it during simulation and it works perfect, however on the FPGA it doesn't seem to work. I would like to test the clocks first before I go any further, but I am open to advice :) \$\endgroup\$
    – David777
    Mar 11, 2021 at 10:47
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    \$\begingroup\$ What about using a single clock where the sender puts data onto the bus on the positive edge and the receiver stores the data on the negative edge? This would give a 180° phase shift. Does it have to be 90° or is 180° acceptable? \$\endgroup\$
    – tim
    Mar 11, 2021 at 11:51
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    \$\begingroup\$ The waveshape is a function of many factors: the characteristics of the driver, the nature of the load on that pin, the bandwidth of the scope, the bandwidth of the scope probes, the grounding method used with the scope probes being the primary influencers. These signals look OK to me, monotonic slope through the grey zone. You can see little spurs on each waveform that correspond to the start of transition on the other channel. This could be related to scope probe grounding. \$\endgroup\$
    – Troutdog
    Mar 11, 2021 at 16:42
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    \$\begingroup\$ @Troutdog I set the probe attenuation to 10x and the waves appeared much more square, with just bit of ringing on the high part of the waveform. \$\endgroup\$
    – David777
    Mar 12, 2021 at 11:31

1 Answer 1

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When there is a 90° phase shift between two 5MHz clocks, that means there is a 50ns skew between them.

If you divide those two clocks by 5000000 using two instances of the same counter structure, you'll get two 1Hz signals with 50ns skew between them (which is roughly 0° at 1Hz). I doubt you can see this with bare eyes.

So to me, this test gives you no indication about the actual skew between your two 5MHz clocks.

It could be far more interesting to forward the two 5MHz clocks on IOs (through ODDR blocks) and use a scope.

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  • \$\begingroup\$ Ok, I will hook up the oscilloscope to some FPGA pins and view the skew. \$\endgroup\$
    – David777
    Mar 10, 2021 at 15:04
  • \$\begingroup\$ I have added the oscilloscope image into my question body. There appears to be no phase shift. \$\endgroup\$
    – David777
    Mar 10, 2021 at 21:40
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    \$\begingroup\$ @David777 Your scope picture shows an output frequency of 0.25 Hz. You still seem to be dividing your 5 MHz signals so you will still fail to see the phase shift for the reason Nipo explained. "The clocks are fed through divider blocks to slow them down as they appeared curved on my scope." You have a 50 MHz scope which should be perfectly capable of showing a 90° phase shift on a pair of 5 MHz square waves. You should be investigating why you're not getting good scope traces rather than adding dividers which destroy the information you're trying to see. \$\endgroup\$
    – Graham Nye
    Mar 10, 2021 at 23:09
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    \$\begingroup\$ @David777 How did you connect the 5 MHz signals? Did you use a 10:1 probe without following the probe compensation adjustment instructions in the scope manual (or elsewhere)? \$\endgroup\$
    – Graham Nye
    Mar 10, 2021 at 23:22
  • \$\begingroup\$ @GrahamNye Ok, I will remove the clock dividers and measure the 5MHz square waves directly. I was just using a normal passive probes set at 1x attenuation. \$\endgroup\$
    – David777
    Mar 11, 2021 at 9:03

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