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I am going to route Ethernet differential par in a four layer PCB which contains Top, PWR planes, GND plane and Bottom stackup. These diff pair are going to be routed in the top layer.

In order to maintain the impedance, I would like to use a power plane as reference beneath the signals, instead of the GND plane, as it provides better dimensions for routing (width and spacing) in the PCB toolkit calculator. But I am afraid that, even an continuous power plane will not provide a proper reference for those Eth differential pairs.

This is because, the supply voltages of the Ethernet Phy is not the same as the board I am designing, they are two different PCBs. But they share the GND net

So my question is: is there any chance that a 3v3/1v8/5v power plane could provide a valid reference for those Ethernet MDI signals?

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  • \$\begingroup\$ @pipe Fair point. I've deleted the comment. \$\endgroup\$
    – Hearth
    Mar 10, 2021 at 14:09
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    \$\begingroup\$ It is commonly done and should work fine. Pay attention to any place where the reference changes. For example near the connector, the reference will probably change to GND. Make sure you have a low impedance cap close to the point where the reference changes. \$\endgroup\$
    – mkeith
    Mar 10, 2021 at 18:52
  • \$\begingroup\$ The power plane is usually much less "busy" than signal planes. Can you simply run a GND reference under the Ethernet traces on power plane and stitch it to GND plane near connector? You have 3 different voltages on that plane already, I see no harm in adding a strip of GND there as well. \$\endgroup\$
    – Maple
    Nov 29, 2021 at 15:38

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If you have sufficient decoupling between the power plane and the GND plane, the power plane can certainly be a reference for controlled impedance tracks.

The decoupling is very close to a short at high frequencies, so your signal wont know the difference between the GND and the power plane.

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With capacitive decoupling between power planes and GND they will be a good reference like GND. In principle it would be "better" that the power plane you choose must be that supplying the Ethernet Phy, but with abundant decoupling and a virtually 0 potential at high frequency, there is no much difference. As for the description of the PCB planes you are going to use a microstrip not a stripline. You should use a minimum of design equations or a transmission line calculator to approximately match the characteristic impedance.

For microstrip you can have a look at e.g. https://www.microwaves101.com/calculators/1201-microstrip-calculator or https://chemandy.com/calculators/microstrip-transmission-line-calculator-hartley27.htm ; I did also some research some years ago related to the various formulations for microstrip equations and their variability: "The variability of microstrips formulas as a source of uncertainty in microwave setups" doi: 10.1016/j.measurement.2015.05.014

For info: For striplines you can have a look e.g. at https://www.allaboutcircuits.com/tools/symmetric-stripline-impedance-calculator/ or https://www.microwaves101.com/calculators/1202-stripline-calculator

This site https://www.eeweb.com/tools/edge-coupled-stripline-impedance/ has a wide list of calculators for many configurations, honestly all you can think of!

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  • \$\begingroup\$ I am using Saturn PCB Design Tookit ;) \$\endgroup\$
    – mugurumov
    Mar 11, 2021 at 10:09
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Take a look at board PCB layout of this evaluation board by Microchip:

https://www.microchip.com/DevelopmentTools/ProductDetails/PartNO/EVB8720

Inspect the Gerber files of that board.

You will notice that the internal GND plane is actually split into two planes.

Also, inspect the thickness of the internal layers and measure the width of the Ethernet tracks. The impedance of those tracks must be 50 Ohm.

The answer to your question is:

Whenever you have a constraint of "controlled impedance track", than the PCB stack-up must be designed in order to fulfill that requirement and the rest of the electronics adapt to that PCB stack-up.

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