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I am a chemistry student trying to replicate a PCB circuit as part of an extra-curricular challenge. I am in over my head, but I am learning a lot and don't want to give up. I tried to route the design with 2-layers, but I have been unsuccessful in making all the required connections due to density/space issues (board x/y dimensions cannot be increased). Therefore I have decided to try a 4-layered design, based on the assumption that these planes will remove a lot of the tracks/traces that are hindering complete connectivity.

The stack:

My electro friend recommended the following setup:

  1. Signal/component top layer (jacks,pots,buttons)

  2. PWR internal plane

  3. GND internal plane

  4. Signal/component bottom layer (the layer with all the components).

General:

  • A audio-signal processor ( audio delay unit).
  • Power consumption: +12V rail: 188mA max / -12V rail: 48mA max
  • Digital power : 3.3 V
  • Audio output : +10.5V to -10.5V maximum output
  • Clock signal output : 0V to 8.2V

Main Components

My question:

If one is dealing with multiple GND nets ( i.e GND, GNDA, GNDADC) or PWR nets (i.e -12VA, +12V, +3V3, +3.3VADC) and one is not to split PWR or GND planes due to assumed capacitance/inductance/energy level differences, then how does one choose which net is allocated to the respective internal layers?

My thoughts:

  • Tie all the GNDS together in one plane? No - The board contains both digital and analog signals and from what I have read, I assume creating a common ground will result in unwanted noise,ground loops,etc.

  • Look at the net list, assume that the amount of connections needed for the respective GND/PWR connections should determine which GND/PWR is allocated to the ground/power plane. I.e Look at the netlist, assume that pad count is proportional to required returning GND/PWR connections, highest GND/PWR padcount determines the GND/PWR plane. Alternatively look at the schematic and count the amounts of different GNDs/PWRs in order to decide. This would then be 3.3 V for the power plane and GND for the ground plane.

Images

PCB

Power section

Full schematic

https://github.com/4ms/DLD/blob/master/hardware/DLD-v1-schematic.pdf

Any help would be greatly appreaciated.

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  • \$\begingroup\$ You have all that stuff on the top layer? Is there a reason you wanted this board to be single sided? What is the use of all the plated through-holes? \$\endgroup\$
    – Ron Beyer
    Mar 10, 2021 at 20:11
  • \$\begingroup\$ Yes, I use stencils and a diy reflow oven - moreover I am building a pnp and would therefore prefer single sided designs. The plated through-holes are for input jacks, buttons and pots. I will edit my post and include my desire for a component/signal plane + PWR plane + GND plane + component signal plane. Thank you for your question. \$\endgroup\$
    – J.Doe
    Mar 10, 2021 at 20:21
  • \$\begingroup\$ I’d suggest you start with a clearer distinction in your component place in regards to analog/digital. Currently the placement looks random. There’s always a debate regarding split ground planes. If you are careful with your layout you may be able to avoid splitting the ground plane. It’s all about where currents are flowing. \$\endgroup\$
    – Kartman
    Mar 10, 2021 at 20:58
  • \$\begingroup\$ I can assure you that the placement is not random, this is more evident when you see the ratsnet/nets. Moreover the functionality and layout of pots, jacks, buttons on the top layer are not obvious when looking at the bottom layer. I would have uploaded the pcb file but as far as I know this is not possible. \$\endgroup\$
    – J.Doe
    Mar 11, 2021 at 1:16
  • \$\begingroup\$ If you were to draw a line that separates analog from digital, it would not be straight. This makes your task more difficult. The challenge is to resolve conflicting constraints. \$\endgroup\$
    – Kartman
    Mar 11, 2021 at 3:21

1 Answer 1

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It's perfectly ok to connect digital and analog circuitry returns to the same copper plane (in fact it is a requirement for certain high performance ADCs) but one has to segregate the analog and digital traces on the top layer or layer underneath the plane and keep them spatially separated until they converge on a common point, usually at the connector supplying power to the board.

Google up anything written by Henry Ott or get a copy of the book "grounds for grounding"

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