It is nice to see a schematic that is drawn "correctly". That is in quotes because it is correct, but way out of favor. Almost no one pays attention to showing the logic state polarity of a signal. In parallel with that, almost no one teaches DeMorgan transformation with the emphasis it deserves. This is part of the difference between a schematic diagram and a wiring diagram. When communicating a design concept, how a gate functions within the circuit is much more important than the traditional name for its part number. But that is a separate rant.
The idea is independent of any logic chip series (74xx, 4xxx, etc), technology (TTL, CMOS, etc.), or compexity (simple gates, multi-core CPUs, etc.). It has to do with which one of the two logic states (high / low, 0 / 1) are "active" - which state is the one that is important, the one that controls decisions, etc. A text description gets pretty fuzzy because there are so many different things these gates are used to do.
Using your schematic as an example, look at the 555 output signal on pin 3. It drives a standard inverter. With the bubble on the input, the schematic is saying that it is the low input state that is the "action state". This is called a "negative-true" inverter. When its input is low, its output is high and this is what causes something to happen; in this case, allowing the output of the two-gate oscillator to be passed through to the transducer. The NAND gate input also has no bubble, indicating that it is the high input that causes a desired action.
Looking at gates 4-5-6 and 8-9-10 (sure do miss reference designators), while these are usually described as NAND gates, the full name is a positive-true NAND gate. But in this circuit, the function as a negative-true device, and the negative-true transformation of a NAND gate is an OR gate. Showing a negative-true input follows one of the rules of this type of symbology - to preserve the correct logical polarity, a bubble always drives a bubble. If it doesn't, then you put a slash across the signal line next to the gate input where the standard depiction changes.
Technically, this type of schematic symbology still is required in military projects, although, again, almost no one does it this way anymore. When properly done, it makes a schematic page with maybe a hundred or more logic gates splattered around much easier to read (decipher?) without assistance from the original designer.
There is more to the logic symbol language than just bubbles. Texas Instruments played a huge roll in both the development of integrated circuit logic devices and the symbols used to describe them. Their datasheets still use them. The functional diagram of an 8-bit latch is just a box with pins and names, but the logic diagram has specific non-text designations for open-collector outputs, edge-triggered versus level-triggered clock inputs, etc.