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I have an application involving an ATmega328 which may be powered while the ATmega is not.

The circuit is an led driver (operating at 24V) which can be controlled either by potentiometers or digitally with the ATmega. In the latter case, the circuit will be connected to a controller board, providing the ATmega with 3.3V. In the first case, though, only the driver and the potentiometers are powered from a 24V PSU and as the pots and the ATmega control the same pin on an IC, the ATmega will see up to 3.3V on some GPIOs while not being powered.

Each pot has additional 680 kΩ in series and the current will therefore be limited to ~30 µA, which should be fine (according to this document). I'm not concerned about the current through the clamping diodes, because I'm bypassing those with Schottky diodes anyway, but I'm clueless about how the ATmega will behave in such a situation. My guess is, that it will boot as soon as there's sufficiently high voltage on the rail (how should it know about a current limitation of the supply).

I'm thinking of a software solution, something like "wait until capacitor is charged above threshold", but that would still require the MCU to show predictable behaviour.

Another idea is to pull down the 3.3V, maybe with a MOSFET, so I don't waste power in the "digital version" operation.

At the moment it is hard for me to decide on a solution because I have not much experience with it and I also couldn't find much information about it either.

So my questions are mainly:

Is there a way to keep the ATmega in a reset state by hardware (from my undestanding, the RESET pin requires a pulse to trigger a reset)?

Is there a chance, that the firmware or data in EEPROM/RAM gets corrupted or that the MCU shows unpredictable/erratic behaviour when the µC is power cycled continuously?

Do microcontrollers include "features" that avoid problems in such a scenario (brownout detector)?

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  • \$\begingroup\$ The ATmega's have an undervoltage setting UVLO. Probably 2.5V UVLO setting is appropriate for the nominal 3.3V supply. 30uA shouldn't be enough to maintain 2.5V ... but if you want to be sure, you can add an external undervoltage reset circuit \$\endgroup\$
    – Pete W
    Mar 12, 2021 at 22:53
  • \$\begingroup\$ @PeteW Thanks for your reply. "30uA shouldn't be enough to maintain 2.5V" - you mean that those 30µA will just "leak away" before they could even raise Vcc? \$\endgroup\$
    – Sim Son
    Mar 12, 2021 at 22:56
  • \$\begingroup\$ through the chip itself... but check the datasheet, UVLO might be like sleep mode. You could also add a resistor in parallel to the bypass caps to be completely sure. (wastes power, but if you're on 24V...) \$\endgroup\$
    – Pete W
    Mar 12, 2021 at 22:58
  • \$\begingroup\$ @PeteW I didn't find anything about under-voltage lockout in the datasheets, but I assume the brownout detector is the same (?). I'm still wondering if those 30µA (it might be more, because there are several pots) would just dissipate or if the mcu would execute "the first lines of code", causing the voltage to drop and then get into the lockout state... would it sink those µA in this state so it doesn't try to boot again? \$\endgroup\$
    – Sim Son
    Mar 12, 2021 at 23:30
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    \$\begingroup\$ @PeteW yes, I found out about this tBOD and that makes me feel much safer now. At least, possible reboot cycles will have a limitation and this all has at least deterministic touch :D \$\endgroup\$
    – Sim Son
    Mar 12, 2021 at 23:56

1 Answer 1

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If you use a brownout detection function (properly configured and specified) you should be able to prevent that.

As always, the devil is in the details and you will have to examine all the tolerances and limits to assure that it will work under all conditions. One number that may be difficult to find is the minimum voltage at which an external non-volatile memory can be written to, if the MCU decides to get into some mischief. In other words the reset must be reliably asserted below that voltage level (perhaps 1V-ish). Sometimes you have to compromise clock speed in order to guarantee the MCU will operate properly at the minimum voltage the brown-out can release, when all tolerances are taken into account.

Some MCUs advertise a brownout function but it's effectively useless at popular supply voltages such as 3.3V because of the way the nominal thresholds and tolerances work out, so it's necessary to use an external circuit.

If the circuitry is inadequate there's a chance every time the power is cycled for there to be an issue. Cycling it constantly increases the odds in a given period of time. Often rump power cycling is worse than cleaning turning it on and off.

You should have a proper reset circuit, always, but personally I'd likely also add circuitry such as transistors or a voltage translator with the same Vdd on each side to prevent that from happening at all.

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  • \$\begingroup\$ Thank you for your elaboration! I wonder how a reset circuit would be possible in this case, where the voltage would be "supplied" from within the chip itself. I mean, I can't place MOSFETs between the clamping diodes and the rail because that's all internal to the chip... \$\endgroup\$
    – Sim Son
    Mar 12, 2021 at 23:39
  • \$\begingroup\$ Not sure what scenario you are thinking of here. \$\endgroup\$ Mar 13, 2021 at 2:33
  • \$\begingroup\$ The scenario is, that up to 100µA are leaking through the clamping diodes. Also, the Atmega doesn't have a EN pin, which I could pull low to prevent the µC from booting. I wonder how an external BOD can be implemented here. Should I add some load to Vcc so those µA have a path to go? Otherwise, I assume, the voltage would just raise back to a normal level and the µC would boot (until BOD triggers again). \$\endgroup\$
    – Sim Son
    Mar 13, 2021 at 13:48

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